Blog Review: October 4

Protecting PCIe links; LLMs in CAE; fabs need Industry 4.0; EDA and cycles; hot-spot analysis; rad-hard electronics; aerospace and defense levels of autonomy.


Cadence’s Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link.

Siemens’ Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more accessible, and more widely adopted

Synopsys’ Vivek Jain argues a paradigm shift is happening in process control that requires modern software solutions and Industry 4.0 approaches to enable maximum semiconductor fab efficiency.

Infineon’s Blaz Klobucar introduces an alternative to traditional printed circuit boards made from natural fibers and encased in a non-toxic polymer that dissolves in hot water, leaving behind only its compostable organic materials and making it easier to salvage electronic components soldered onto the board.

The ESD Alliance’s Bob Smith chats with Needham & Company’s Charles Shi about why EDA doesn’t go through the same boom and bust cycles as the larger semiconductor industry, research spending, and the symbiotic relationships between EDA suppliers and foundries.

Ansys’ Aaron Talwar considers the benefits that high levels of autonomy could bring to the aerospace and defense industry, from formation flying and swarming to unmanned cargo transport.

Arm’s Jiaming Guo concludes demonstrating a performance analysis workflow on Armv8-A using Perf for Linux with the Performance Monitor Unit extension by showing how to do hot-spot analysis and an optimization method with validation.

Keysight’s Michele Robinson-Pontbriand suggests using smart home systems to manage and reduce home energy consumption but notes that high quality product development is critical to the down-stream energy savings potential.

Renesas’ Chris Stephens considers what the increase in space launch activity means for radiation hardened and tolerant electronics.

Plus, check out the blogs featured in the latest Systems & Design newsletter:

Technology Editor Brian Bailey explains why it’s never easy to make sure that everyone is speaking the same language, especially when it comes to models. But without a clear understanding of needs, nothing else makes sense.

Synopsys’ Yuval Shay illustrates how to use AI-driven automation to quickly reimplement analog designs in a new technology node.

Arteris’ Frank Schirrmeister lays out what goes on between the sensor and the data center.

Codasip’s Laurent Arditi shows how to distinguish between escapable and unescapable deadlocks.

Movellus’ Barry Pangrle dives into a new architecture with no central or off-chip memory, and no von Neumann bottleneck.

Keysight’s Anda Ioana Enescu Buyruk and Catalin Tudor examine how the introduction of neural networks has paved the way for greater autonomy in AI systems,

Cadence’s Qingyu Lin talks about why it’s not always practical to save all signals during simulation.

Siemens EDA’s David Abercrombie digs into the practicalities of shifting sign-off verification flows into the design and implementation phases.

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