Blog Review: Sept. 12

Cadence’s Paul McLellan checks out the impact the Meltdown, Spectre, and Foreshadow vulnerabilities will have on future processor design with an overview of speculative execution and why it’s important to current architectures.

Mentor’s Matthew Ballance suggests some ways to find existing information and descriptions that can be used to jump-start the creation of portable stimulus models.

Synopsys’ Taylor Armerding points to a common cause of several recent security breaches: leaky APIs that expose more information than they’re meant to.

Verification expert Neil Johnson weighs the costs and benefits of investing in portable stimulus, from the difficulties of achieving platform independence to the promise of accelerated coverage closure.

Yole Développement’s Eric Mounier looks at what’s on the horizon for MEMS and sensors and the new applications that will push strong growth in the consumer market over the next five years.

Ansys’ Mark Ravenstahl points to why signal integrity, electromagnetic, circuit and RF system level simulations are important in combating radio frequency interference in antenna design.

Arm’s Oxana Latypova takes a peek at cellular IoT features at Mobile World Congress Americas and why it’s such a fast-growing area.

A Rambus writer points to a pair of proposed laws in California that aim to push companies to improve the security of Internet-connected devices, but manufacturers argue the bills are too vauge.

Nvidia’s Isha Salian looks at yet another use for deep learning: helping predict instances of life-threatening sepsis earlier in pediatric patients.

Plus, check out the blogs featured in the recent IoT, Security & Automotive and Packaging, Test & Materials newsletters:

Editor In Chief Ed Sperling zeroes in on what needs to happen to make next-gen wireless technology ubiquitous.

Executive Editor Ann Steffora Mutschler finds a twisty path to building automotive chips, including selling a vision to customers.

Mentor’s Omar El-Sewefy points to verification challenges for photonics ICs, from false DRC errors to the absence of a SPICE source netlist.

Arteris IP’s Kurt Shuler explains how to eliminate system bottlenecks and improve efficiency by using a cache between functional blocks and external memory.

Synopsys’ Robert Vamosi argues that for autonomous driving to become a reality, the early stages of vehicle electrification must become more robust.

Achronix’s Volkan Oktem digs into eFPGA configuration and how long the process should take.

Flex Logix’ Geoff Tate looks at how eFPGAs measure up on inferencing.

Editor In Chief Ed Sperling argues that there’s no such thing as zero defects, particularly when you don’t know for sure what needs to be tested.

Brewer Science’s Kim Yess examines materials changes that are needed to enable heterogeneous integration.

Advantest’s Judy Davies looks at the good and bad of 3D printing.

Synopsys’ Steve Pateras notes that as test pattern compression falls behind, new techniques are needed to keep test times in check.