Blog Review: May 2


Arm's Greg Yeric looks towards the future of 3D ICs with a dive into transistor-level 3D, including the different proposed methods of stacking transistors, power/performance benefits, and challenges such as parasitic resistance. Mentor's Kurt Takara, Chris Kwok, Dominic Lucido, and Joe Hupcey III explain how a custom synchronizer methodology can help avoid CDC mistakes and errors in FPGA des... » read more

EDA In The Cloud (Part 2)


Semiconductor Engineering sat down to discuss the migration of EDA tools into the Cloud with Arvind Vel, director of product management at ANSYS; Michal Siwinski, vice president of product management at Cadence; Richard Paw, product marketing manager at DellEMC, Gordon Allan, product manager at Mentor, a Siemens Business; Doug Letcher, president and CEO of Metrics, Tom Anderson, technical marke... » read more

Manufacturing Bits: May 1


Adaptive materials The U.S. Army Research Laboratory (ARL) and the University of Maryland have developed a technique to make adaptive materials. Using ultraviolet light, researchers have devised a way that causes a composite material to become stiffer and stronger on-demand. This in turn could enable a variety of new capabilities for the U.S. military, such as rotorcraft design. In this... » read more

System Bits: May 1


Tiniest implanted wireless nerve stimulator UC Berkeley researchers, co-led by Rikky Muller, who is also assistant professor of electrical engineering and computer sciences at Berkeley, have built what they say is the smallest volume, most efficient wireless nerve stimulator to date. Before this milestone, UC Berkeley engineers demonstrated the first implanted, ultrasonic neural dust sensor... » read more

Power/Performance Bits: May 1


Low power video streaming Engineers at the University of Washington developed a method for streaming HD video from a lightweight, wearable camera. The researchers used backscatter to send pixel data to a more powerful device, such as a smartphone or laptop, for power-hungry tasks like video processing and compression that have made a lightweight streaming camera out of reach. The pixels in ... » read more

Re-Engineering Humanity


The technology industry is comfortable with trends that increase linearly for decades—and many that follow quadratic curves, also seemingly forever. Moore's Law and the rate of adoption of new technologies are two examples that come to mind. Those same trends can be used to scare or even create panic amongst a less informed general public. Such is the case with Artificial Intelligence (AI)... » read more

What’s Hot At #55DAC


This June at DAC, we will have the opportunity to discuss and learn about key topics that are emerging in the system design and automation community. To start, we have the challenge of designing at the end of silicon scaling and beyond: devices, design complexity and verification. On Monday, there will be a tutorial on designing at advanced technology nodes, followed by an invited session o... » read more

Partitioning Becomes More Difficult


The divide-and-conquer approach that has been the backbone of verification for decades is becoming more difficult at advanced nodes. There are more interactions from different blocks and features, more power domains, more physical effects to track, and far more complex design rules to follow. This helps explain why the number of tools required on each design—simulation, prototyping, em... » read more

Advanced 3D Design Technology Co-Optimization For Manufacturability


By Yu De Chen, Jacky Huang, Dalong Zhao, Jiangjiang (Jimmy) Gu, and Joseph Ervin Yield and cost have always been critical factors for both manufacturers and designers of semiconductor products. It is a continuous challenge to meet targets of both yield and cost, due to new device structures and the increasing complexity of process innovations introduced to achieve improved product performanc... » read more

The Week In Review: Manufacturing


Chipmakers As reported, Intel is struggling at 10nm. Intel already has encountered some difficulties, as the chip giant late last year pushed out the volume ramp of its new 10nm process from the second half of 2017 to the first part of 2018, according to analysts. Intel continues to struggle with 10nm, and has delayed the volume ramp again, according to multiple reports. During its earnings... » read more

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