The Week In Review: Design


M&A Alibaba acquired C-Sky Microsystems, which focuses on 32-bit embedded CPU IP cores in both low power and high performance varieties, as well as SoC and MCU platforms. Founded in 2001, the Hangzhou, China-based C-Sky previously received investment from Alibaba, and the two companies collaborated on a hardware and software platform for IoT and cloud integration. The deal comes on the hee... » read more

The Week in Review: IoT


Cybersecurity Cybersecurity concerns continued to generate news this week. Symantec reported a corporate espionage hacking campaign against manufacturers of medical supplies, dubbing the efforts “Orangeworm.” The hackers have attacked 24 or more targets this year, and almost 100 since 2015, according to the security software and services firm. Meanwhile, the House Energy and Commerce Co... » read more

The Great Chip Shakeup


Facebook, Alibaba, Google, Apple and Samsung are all designing their own chips. So are Cisco and Huawei. So what exactly does this mean for big chipmakers and the semiconductor ecosystem? While your first impulse might be to draw a straight line between Qualcomm's decision to cut 1,500 jobs and reports about giant systems companies developing chips in-house, it's not clear there is any corre... » read more

Interface DRC Can Streamline Chip-Level Interface Physical Verification


In most design companies, the chip-level physical implementation teams responsible for design floorplanning in place and route (P&R) environments also manage top-level physical verification from the early floorplanning stages through tapeout. In early floorplanning stages, blocks placed in the chip-level floorplan are usually still under development. Merging these incomplete blocks with the... » read more

Neural Nets In ADAS And Autonomous Driving SoC Designs


Automotive electronics has ushered in a new wave of semiconductor design innovation and one new technology gaining a lot of attention is neural networks (NNs). Advanced driving assistance systems (ADAS) and autonomous car designs now rely on NNs to meet the real-time requirements of complex object-recognition algorithms. The concept of NNs has been around since World War II, promising a futu... » read more

Bugs With Long Tails Can Be Costly Pests


I don’t think Van Gogh was considering high performance computing or server architecture, but he made a lot of sense when he said "great things are done by a series of small things brought together." A series of very small things can, and do, create big things: that’s the fundamental premise of long-tail marketing: Amazon, for one has built a strong business from selling millions of niche i... » read more

Inside UVM, Take Three


The reason why UVM came up with such phases is because synchronization among all design-testbench was necessary. Using Verilog and VHDL, verification engineers did not have facilities such as clocking block or run phases. Now, it is very important that the time at which test vectors applied from test-bench reaches the Design Under Test(DUT) at the same time. If timing for different signals vari... » read more

Why Your FPGA Synthesis Flow Requires Verification


When you think about it, logic synthesis is a vital but rather intimidating part of modern chip design. This process takes a high-level description of intended functionality, written in an RTL language that looks more like software than hardware, and implements it using the low-level building-block library of an ASIC or FPGA device. The resulting gate-level netlist must meet a variety of requir... » read more

Hidden Costs Of Shifting Left


The term "Shift Left" has been used increasingly within the semiconductor development flow to indicate tasks that were once performed sequentially must now be done concurrently. This is usually due to a tightening of dependences between tasks. One such example being talked about today is the need to perform hardware/software integration much earlier in the flow, rather than leaving it as a sequ... » read more

Deep Learning And The Future


Following up from my last post on our deep learning event at the Computer History Museum – “ASICs Unlock Deep Learning Innovation,” I’d like to take a glimpse into the future. Like many such discussions, it’s often useful to take a look back first to try and make sense out of what is to come.  That’s essentlially what our keynote speaker, Ty Garibay, did at the event. Ty is the CTO... » read more

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