IP Electromagnetic Crosstalk Requires Contextual Signoff


By Magdy Abadir and Anand Raman Continuous advancement in technology scaling is enabling the emergence of high-performance application markets such as artificial intelligence, autonomous cars and 5G communication. These electronic systems operate at multi-GHz speed, while consuming the lowest amount of power possible leaving very little margin for error. Chips in these systems are highly in... » read more

The Week In Review: Manufacturing


R&D Late last month, the U.S. Congress finalized the federal spending for the remainder of the fiscal year. This includes R&D spending as well. “There was grave concern over the future of federal spending with the release of the president’s FY 2018 budget, which would have cut the National Science Foundation (NSF) budget by 11% and National Institutes of Standards & Technology (NIST) spend... » read more

The Week in Review: IoT


Finance Palo Alto, Calif.-based Armis raised $30 million in Series B funding, bringing total funding for the provider of enterprise Internet of Things security to $47 million. Red Dot Capital Partners of Israel led the round, joined by Bain Capital Ventures. Existing investors Sequoia Capital and Tenaya Capital also participated in the latest funding, which Armis will use to expand sales and m... » read more

The Week In Review: Design


Tools & IP Cadence unveiled its latest DSP for embedded vision and AI, Tensilica Vision Q6 DSP. The DSP is built on a 13-stage processor pipeline and new system architecture designed for use with large local memories, and achieves 1.5GHz peak frequency and 1GHz typical frequency at 16nm. Compared to its predecessor, it offers 1.5X greater vision and AI performance than its predecessor and ... » read more

Architecture, Materials And Software


AI, machine learning and autonomous vehicles will require massive improvements in performance, at the same power consumption level (or better), over today's chips. But it's obvious that the usual approach of shrinking features to improve power/performance isn't going to be sufficient. Scaling will certainly help, particularly on the logic side. More transistors are needed to process a huge i... » read more

Aging Models: The Basis For Predicting Circuit Reliability


Today, many products are based on high-performance electronic systems and integrated circuits (ICs), and the importance of these elements is ever-increasing. A certain tension arises here as these applications often call for a large amount of processing power and reliability. The processing power can best be supplied with highly scaled semiconductor technologies. However, these manufacturing te... » read more

Power-Aware Intent And Structural Verification Of Low-Power Designs


In Part 1 of this series on power aware (PA) verification, we examined the foundations and verification features of PA static checks. In Part 2, we will discuss the features of the static verification library and describe best static verification practices. Library for Static Verifications Cell-level and pin-level attributes from Liberty are mandatorily required for accurate PA-Static verif... » read more

Navigating The Foggy Edge Of Computing


The National Institute of Standards and Technology (NIST) defines fog computing as a horizontal, physical or virtual resource paradigm that resides between smart end-devices and traditional cloud or data centers. This model supports vertically-isolated, latency-sensitive applications by providing ubiquitous, scalable, layered, federated and distributed computing, storage and network connecti... » read more

AI Signals A New Change Of Perspective


A very long time ago, I was a student at MIT, programming with card decks in APL on IBM mainframes and studying AI in a class from Patrick Winston (who took over MIT’s AI lab from the legendary Marvin Minsky). I kept the text book as a reminder of where the world would go. Over four titanic shifts, mainframes/card decks became VAX/VT100, thence to IBM PCs and PC clients tied by Ethernet to co... » read more

Supply Monitoring On 28nm & FinFET: The Challenges Posed


A Q&A with Moortec CTO Oliver King. What are the issues with supplies on advanced nodes? The supplies have been coming down, quicker than the threshold voltages which has led to less supply margin. In addition to this, the interconnects are becoming thinner and closer together, which is pushing up resistance and also capacitance. What is the effect of these issues? In short, it... » read more

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