The Week In Review: Manufacturing
By Mark LaPedus - 24 Apr, 2015 - Comments: 0

For years, Altera’s sole foundry was TSMC. Then, not long ago, Altera selected Intel as its foundry partner for 14nm. TSMC still handles 20nm and above work for Altera. This quarter, Altera was supposed to select a foundry partner for 10nm. This week, Altera posted lackluster results in the quarter. Altera did not elaborate on its 10nm plans, nor did it discuss the Intel rumors. "Altera did n... » read more

Week 46: Don’t Be Late
By Anne Cirkel - 24 Apr, 2015 - Comments: 0

Last year we moved DAC’s official opening session from Tuesday to Monday. The move makes perfect sense as there is much on the Monday schedule, including tutorials as well as the designer and IP track sessions. The opening session has always been special at DAC. It is the most popular general session as various awards are given out that day too. This is how it works: Throughout the year A... » read more

The Week In Review: Design/IoT
By Jesse Allen - 24 Apr, 2015 - Comments: 0

Mergers & Acquisitions Synopsys continued expansion into the software security market with the acquisition of Codenomicon. The Finnish company was in the headlines this time last year when it discovered the Heartbleed bug during product testing. Tools Mentor Graphics released Calibre xACT, a parasitic extraction platform which automatically optimizes extraction techniques based on ... » read more

The Auto Industry Taking Things Into Their Own Hands
By Mathew Clark - 23 Apr, 2015 - Comments: 0

A new standard is here! I can hear a collective groan, but I suggest we quiet down and see what this new direction has to offer. When Audi AG, BMW AG, Daimler AG, Porsche AG, and Volkswagen AG get together to work up a document, there is a shift happening. Although this standard is not out-of-the-oven-fresh, it will mean a change in the industry in the near future. But before I continue, I want... » read more

Moore’s Law At 50
By Ed Sperling - 23 Apr, 2015 - Comments: 0

Moore's Law turned 50 this week…but not because of Gordon Moore. He observed that the number of transistors crammed onto a piece of silicon was doubling every 18 to 24 months and predicted that would continue to be the case. He was right, but it took many thousands of engineers who created methodologies and tools to automate the design and equipment to manufacture complex chips to make that o... » read more

What Not To Verify
By Ann Mutschler - 23 Apr, 2015 - Comments: 0

It is well understood that [getkc id="10" kc_name="verification"] is all about mitigating and managing risk, and success here begins with a good verification planning process. During the planning process, the project team creates a list of specific design functions and use cases that must be verified—and they identify the technique used to verify each specific item on the list. That list c... » read more

What EDA’s Big 3 Think Now
By Ed Sperling - 23 Apr, 2015 - Comments: 0

In the past two months the CEOs of Cadence, Synopsys and Mentor Graphics delivered their annual high-level messages to their respective user groups. Semiconductor Engineering attended all of the speeches at these conferences, as it did in 2014 (see story here). From a high level, the big issues for CEOs last year were Moore's Law, the costs of design, the impact of low power, and business-... » read more

Is Art Acceptable In Verification?
By Brian Bailey - 23 Apr, 2015 - Comments: 0

The industry appears to have accepted that [getkc id="10" kc_name="verification"] involves art as well as science. This is usually based on one of three reasons, namely: the problem is large and complex; there is a lack of understanding and tools that enable it to be automated; and if it could be made a science, all of the jobs would have migrated offshore. Today, designs are built from pre-... » read more

Partly Sunny, With A Chance For Explosive Growth
By Mike Gianfagna - 23 Apr, 2015 - Comments: 0

I recently attended a session at the Mentor Graphics User Conference (User2User) in San Jose that dealt with the changing foundry landscape. The session was moderated by SemiWiki's Dan Nenni and included: • Giorgio Cesana, director of technology at STMicroelectronics • Jack Harding, co-founder, president & CEO of eSilicon • Lluis Paris, deputy director of worldwide IP alliances at ... » read more

Pressure Builds To Revamp The Design Flow
By Ed Sperling - 23 Apr, 2015 - Comments: 1

Without [getkc id="7" kc_name="EDA"] there would be no [getkc id="74" comment="Moore's Law"] as we know it today, and without Moore's Law there would be a much more limited need for EDA. But after more than three decades of developing design flows packed with sophisticated tools to automate semiconductor design through verification, and thereby enable feature shrinks that are the basis of Moore... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy