The Importance Of Safety Analysis In Automotive Systems Engineering


Over the years, automotive safety has maintained a top spot in the minds of original equipment manufacturers (OEMs). Self-driving vehicles, advanced driver assistance systems (ADAS), and AI-driven innovations designed to further protect us on the road are rapidly evolving. It’s been an exciting journey but not without some hiccups for automotive manufacturers along the way. For instance, a... » read more

Chiplets Add New Power Issues


Delivering and managing power are becoming key challenges in the rollout of chiplets, adding significantly to design complexity and forcing chipmakers to weigh tradeoffs that can have a big impact on the performance, reliability, and the overall cost of semiconductors. Power is a concern for every chip and chiplet design, even if the specifics differ based on the application. Systems vendors... » read more

Physics Simulation With Graph Neural Networks Targeting Mobile


By Máté Stodulka and Tomas Zilhao Borges The demand for immersive, realistic graphics in mobile gaming and AR or VR is pushing the limits of mobile hardware. Achieving lifelike simulations of fluids, cloth, and other materials historically requires intensive mathematical computations. While these traditional methods yield highly accurate results, they have been too resource-heavy to run re... » read more

No Fooling With Voxel Pooling


A variety of new and complicated transformer models have emerged in the past 18 to 24 months as new “must have” networks in advanced automotive use cases. These novel architectures often introduce new network operators or novel ways of combining tensors – often from different types of sensors – in ways to enhance detection and recognition of objects in L3 / L4 / L5 ADAS and autonomous d... » read more

Integrating Data From Design, Manufacturing, And The Field


Chip design is starting to include more options to ensure chips behave reliably in the field, boosting the ability to tweak both hardware and software as chips age. The basic problem is that as dimensions become smaller, and as more features are added into devices — especially with heterogeneous assemblies of chiplets running some type of AI — the potential for thermally induced structur... » read more

Energy-Efficient Scalable Silicon Photonic Platform For AI Accelerator HW


A new technical paper titled "Large-Scale Integrated Photonic Device Platform for Energy-Efficient AI/ML Accelerators" was published by researchers at HP Labs, IIT Madras, Microsoft Research and University of Michigan. Abstract "The convergence of deep learning and Big Data has spurred significant interest in developing novel hardware that can run large artificial intelligence (AI) workload... » read more

Review Of Recent Advancements in THz-based 6G: Devices, Circuits, Antennas and Packaging


A new technical paper titled "A Survey on Advancements in THz Technology for 6G: Systems, Circuits, Antennas, and Experiments" was published by UCLA. Abstract "Terahertz (THz) carrier frequencies (100 GHz to 10 THz) have been touted as a source for unprecedented wireless connectivity and high-precision sensing, courtesy of their wide bandwidth availability and small wavelengths. However, no... » read more

Multi-Party Computation for Securing Chiplets


A new technical paper titled "Garblet: Multi-party Computation for Protecting Chiplet-based Systems" was published by Worcester Polytechnic Institute. Abstract "The introduction of shared computation architectures assembled from heterogeneous chiplets introduces new security threats. Due to the shared logical and physical resources, an untrusted chiplet can act maliciously to surreptitiousl... » read more

What’s Changing In Outlier Detection


Commonly used outlier detection approaches, such as parts average testing or determining whether a die is good based upon other dies in the immediate neighborhood, are falling short in advanced packages and SoCs. Some devices may pass tests and still fail in the field. In the past, this was solved by adding margin into designs, but that margin now takes too big a bite out of performance and pow... » read more

New Innovative Way To Functionally Verify Heterogeneous 2D/3D Package Connectivity


Historically, IC package design has been a relatively simple task which allowed the die bumps to be fanned out to a geometry suitable for connecting to a printed circuit board. The package netlist was often captured by the package designer, typically using Excel to manually assign net names to the desired die bumps and BGA balls to achieve the intended connection. Modern package and interpos... » read more

← Older posts Newer posts →