System Level Test — A Primer


As semiconductor geometries become smaller and greater complexity is pushed into chips or packages, System Level Test (SLT) is becoming essential. SLT is testing a device under test (DUT) as it is used in the end-use system, by merely using it rather than creating test vectors, as is done with traditional automated test equipment (ATE). Tests are still written but in a different way… Pete... » read more

Semiconductor Test: Staying Ahead Of Nanodevices


In the semiconductor fabrication process, engineers continue to innovate, enabling smaller transistors and higher density circuits. The transition to finFETs allowed 7nm and 5nm processes to realize circuits of amazing density, and the progress of nanosheet transistors provides confidence in the future advancement of digital circuit cost reduction and performance improvement. As individual t... » read more

Effect of Different Frequency Scaling Levels on Memory in Regard to Total Power Consumption in Mobile MPSoC


New technical paper titled "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems" from researchers at University of Essex, Nosh Technologies, and University of Southampton. Abstract "Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance r... » read more

Fermi-level Tuning Improves Device Stability of 2D Transistors With Amorphous Gate Oxides


New technical paper titled "Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning" from researchers at Institute for Microelectronics, TU Wien, AMO GmbH, University of Wuppertal, and RWTH Aachen University. Abstract "Electronic devices based on two-dimensional semiconductors suffer from limited electrical stability because charge carriers origin... » read more

Scalable Approach to Fabricate Memristor Arrays at Wafer-scale


New technical paper titled "Wafer-scale solution-processed 2D material analog resistive memory array for memory-based computing" from researchers at National University of Singapore and Institute of High Performance Computing, Singapore. Abstract "Realization of high-density and reliable resistive random access memories based on two-dimensional semiconductors is crucial toward their develop... » read more

The Methods Of Memory Encryption To Protect Data In Use


In my blog “The Importance of Memory Encryption for Protecting Data in Use,” I discussed the growing industry consensus on the imperative of incorporating memory encryption in computing architectures. In part two of this series, I’ll explore the cipher algorithms and modes that can be used to protect data stored in and accessed from memory, or in other words, used to protect data in use. ... » read more

Startup Funding: May 2022


May was another strong month for China as it continues its push to build a native semiconductor ecosystem. Over half the month's total funding went to startups in the country. Over half the companies funded were from China as well, including two FPGA companies, three making CPUs, a GPU startup, and numerous networking and wireless chip companies. Two of those, in FPGAs and CPUs, raised rounds s... » read more

CORDIC-based Chip Design With Iterative Pipelining Architecture for Biped Robots


New technical paper titled "Efficient and Accurate CORDIC Pipelined Architecture Chip Design Based on Binomial Approximation for Biped Robot," from researchers at Chung Yuan Christian University (Taiwan) and Ateneo de Manila University (Philippines). Abstract: "Recently, much research has focused on the design of biped robots with stable and smooth walking ability, identical to human bein... » read more

High-throughput LHSI Reflectometry Technique For ICU and IWU Measurements of Semiconductor Devices


New technical paper titled "Toward realization of high-throughput hyperspectral imaging technique for semiconductor device metrology," from researchers at Samsung Electronics Co. Abstract "Background: High-throughput three-dimensional metrology techniques for monitoring in-wafer uniformity (IWU) and in-cell uniformity (ICU) are critical for enhancing the yield of modern semiconductor manu... » read more

Addressing Vehicle Security Vulnerabilities With Structure-Aware CAN Fuzzing System


New technical paper titled "Efficient ECU Analysis Technology Through Structure-Aware CAN Fuzzing" from researchers at Soongsil University, Korea University, and Hansung University with funding from the Korean government. Abstract "Modern vehicles are equipped with a number of electronic control units (ECUs), which control vehicles efficiently by communicating with each other through the co... » read more

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