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Fermi-level Tuning Improves Device Stability of 2D Transistors With Amorphous Gate Oxides

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New technical paper titled “Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning” from researchers at Institute for Microelectronics, TU Wien, AMO GmbH, University of Wuppertal, and RWTH Aachen University.

Abstract
“Electronic devices based on two-dimensional semiconductors suffer from limited electrical stability because charge carriers originating from the semiconductors interact with defects in the surrounding insulators. In field-effect transistors, the resulting trapped charges can lead to large hysteresis and device drifts, particularly when common amorphous gate oxides (such as silicon or hafnium dioxide) are used, hindering stable circuit operation. Here, we show that device stability in graphene-based field-effect transistors with amorphous gate oxides can be improved by Fermi-level tuning. We deliberately tune the Fermi level of the channel to maximize the energy distance between the charge carriers in the channel and the defect bands in the amorphous aluminium gate oxide. Charge trapping is highly sensitive to the energetic alignment of the Fermi level of the channel with the defect band in the insulator, and thus, our approach minimizes the amount of electrically active border traps without the need to reduce the total number of traps in the insulator.”

Find the open access technical paper here and the IEEE additional writeup here. Published June 2022.

Knobloch, T., Uzlu, B., Illarionov, Y.Y. et al. Improving stability in two-dimensional transistors with amorphous gate oxides by Fermi-level tuning. Nat Electron (2022). https://doi.org/10.1038/s41928-022-00768-0

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