Virtual Exploration Of Novel Vertical DRAM Architectures


In this article, we demonstrate a pathfinding technique for a novel Vertical DRAM technology. First, we identify important process parameters (defined by current semiconductor production equipment capabilities) that strongly impact yield. By using a virtual model, we then perform experimental optimization of the Vertical DRAM device across specific target ranges, to help predict and improve the... » read more

Single Vs. Multi-Patterning Advancements For EUV


As semiconductor devices become more complex, so do the methods for patterning them. Ever-smaller features at each new node require continuous advancements in photolithography techniques and technologies. While the basic lithography process hasn’t changed since the founding of the industry — exposing light through a reticle onto a prepared silicon wafer — the techniques and technology ... » read more

Applying Machine Learning To Accelerate TCAD Calibration


TCAD models are the fundamental building blocks for the semiconductor industry. Whether it is a new process node or a new multi-billion dollar fab, accurate TCAD models must be developed and calibrated before they can be deployed in technology development. While TCAD models have been around for (many) decades, their complexity is growing exponentially, as is the demands placed on the R&D en... » read more

Precise Control Needed For Copper Plating And CMP


Chipmakers are relying on machine learning for electroplating and wafer cleaning at leading-edge process nodes, augmenting traditional fault detection/classification and statistical process control in order to extend the usefulness of copper interconnects. Copper is well understood and easy to work with, but it is running out of steam. At 5nm and below, copper plating tools are struggling to... » read more

AI: Great, But Somehow Still Not Very Good


In an invited presentation at CS Mantech 2024, Charlie Parker, senior machine learning engineer at Tignis, provides context for the AI hype cycle with a high-level overview of machine learning concepts, then explores how the technology fits into the fab, from inventory management to institutional knowledge capture, but warns that it is worth being aware of the ways in which machine learning mod... » read more

Photoresist Materials Development


Toru Fujimori of FUJIFILM Corporation provides an overview of the development of photoresist materials for masks and wafers to support continued pattern shrinkage and address stochastic issues in lithography. » read more

Custom Substrates Save Assembly Time, Resources


Time-to-market (TTM) and performance are two of the most pressing issues in chip design and manufacturing. Designing devices for high-speed, high-performance applications requires immediate access to substrates so that product development can proceed quickly. Quick substrate access is also vital to validating intellectual property (IP) cores used in application-specific ICs (ASICs) – all of w... » read more

Driving Generative AI Innovation: 5 Competitive Advantages For Taiwan In Enabling The Next Industrial Revolution


The developments in AI technology have been significant in recent years. In 2016, DeepMind AlphaGo’s victory over a human Go world champion was a significant milestone in the advancement of artificial intelligence (AI). Later in 2022, the emergence of ChatGPT 3.5 further strengthened the AI landscape. Generative AI has been a disruptive innovation, automating the creation of text, images... » read more

GPU Acceleration for Pixel-based Computing in Various Mask Processing and Verification Steps


A technical paper titled "Leaping into the curvy world with GPU accelerated O(p) computing" was published by researchers at D2S, Inc. The papers discusses the advantages of using GPU acceleration for pixel-based computing during various mask processing and verification steps.  It found that the O(p) approach for GPU acceleration is effective in handling data processing for curvy masks. F... » read more

Ruthenium Interconnects On Tap


Chipmakers' focus on new interconnect technology is ramping up as copper's effectiveness continues to diminish, setting the stage for a significant shift that could improve performance and reduce heat at future nodes and in advanced packages. The introduction of copper interconnects in 1997 upended the then-standard tungsten via/aluminum line metallization scheme. Dual damascene integration ... » read more

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