Chip Industry Technical Paper Roundup: Jan 12
By Emma Riverso - 12 Jan, 2026 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=513 /] Find more semiconductor research papers here. » read more

Data Centers Need High Reliability Semiconductors
By Geoff Tate - 12 Jan, 2026 - Comments: 0

“In the world of designing cars, planes, AI factories … you’ve got to be perfect," said Nvidia CEO Jensen Huang on CNBC last month. "And the reason for this is because there is so much at stake.” Cars and planes need to be extremely reliable because people die if they aren’t. In AI data centers, no one dies when systems fail, but the economic impact is gigantic because Amazon, Goog... » read more

Research Bits: Jan. 12
By Jesse Allen - 12 Jan, 2026 - Comments: 0

Wafer-scale two-photon lithography Researchers from Lawrence Livermore National Laboratory (LLNL) and Stanford University demonstrated a two-photon lithography (TPL) platform for wafer-scale manufacturing. The TPL platform uses large arrays of metalenses to split a femtosecond laser into more than 120,000 coordinated focal spots that write simultaneously across centimeter-scale areas. The a... » read more

Four Architectural Opportunities for LLM Inference Hardware (Google)
By Technical Paper Link - 09 Jan, 2026 - Comments: 0

A new technical paper titled "Challenges and Research Directions for Large Language Model Inference Hardware" was published by Google. Abstract "Large Language Model (LLM) inference is hard. The autoregressive Decode phase of the underlying Transformer model makes LLM inference fundamentally different from training. Exacerbated by recent AI trends, the primary challenges are memory and in... » read more

Chip Industry Week in Review
By The SE Staff - 09 Jan, 2026 - Comments: 0

SIA's latest monthly global semiconductor sales report reflects a ~30% YOY increase, hitting a record $75.3B in November 2025. Asia Pacific had a notable 66% increase. Cadence launched its Chiplet Spec-to-Packaged Parts ecosystem to accelerate time to market for chiplet development for physical AI, data centers, and HPC applications. Initial IP partners joining Cadence include Arm, Arteris, ... » read more

Aging Aware Steepening Metric for the Fault Coverage of a Test Set (Purdue Univ.)
By Technical Paper Link - 08 Jan, 2026 - Comments: 0

A new technical paper titled "Aging Aware Steepening of the Fault Coverage Curve of a Scan Based Transition Fault Test Set" was published by researchers at Purdue University. Abstract "Chip aging may result in hardware defects whose likelihood of occurrence depends on the layout and functional workload at the defect site. In-field testing is important for the detection of defects that occur... » read more

Navigating FIPS 140-3
By Berardino Carnevale - 08 Jan, 2026 - Comments: 0

FIPS 140‑3 is a U.S. federal standard. Validations are issued under the Cryptographic Module Validation Program (CMVP), jointly managed by the National Institute of Standards (NIST) and the Canadian Center for Cyber Security (CCCS). These validations are accepted by both U.S. and Canadian federal agencies. The standard imposes strict requirements on security boundaries, operational environmen... » read more

Airbus A320 Recall: Rethinking Fault Testing In Aerospace
By Marc Witteman - 08 Jan, 2026 - Comments: 0

Fault injection is usually discussed in the context of security, where adversaries deliberately induce faults to bypass protections or extract sensitive information. In safety engineering, by contrast, faults are often treated as rare, random events driven by natural or environmental factors. The recent Airbus A320 recall is a good example of how a primarily safety incident can still benefit fr... » read more

All Models Are Wrong, But Some Are Useful: Lessons From Everyday Life
By Andrea Battistella - 08 Jan, 2026 - Comments: 0

Have you ever checked a weather forecast, packed an umbrella, and then spent the day under clear blue skies? Or trusted your navigation app to save time, only to end up stuck behind a tractor? These moments are frustrating—but they illustrate a fundamental truth: All models are wrong, but some are useful. This principle, coined by statistician George Box, applies everywhere—from predi... » read more

Securing Terabit Ethernet Networks With 1.6T MACsec Security Modules
By Dana Neustadter - 08 Jan, 2026 - Comments: 0

By Dana Neustadter and Vincent van der Leest In the realm of high-performance computing (HPC) and data centers, Ethernet is one of the interfaces of choice due to its scalability, reliability, and broad industry support. Ethernet's ability to efficiently handle large volumes of data makes it ideal for HPC environments that require high-speed data transmission and seamless integration with ex... » read more

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