Hunting For Macro Defects
By Anne Meixner - 08 Apr, 2025 - Comments: 0

Detecting macro-defects early in the wafer processing flow is vital for yield and process improvement, and it is driving innovations in both inspection techniques and wafer test map analysis. At the wafer level, a macro-defect can affect more than one die, and in some cases large regions of a wafer. Finding macro defects can indicate a significant issue with a process module, a particular fi... » read more

A Universal Deep Learning Model For Segmenting Automated Optical Inspection Images
By Nordson Test And Inspection - 08 Apr, 2025 - Comments: 0

A new technical paper titled "A Universal AI-Powered Segmentation Model for PCBA and Semiconductor" was published by researchers at Nordson Corporation. "This paper introduces a novel universal deep learning model designed to segment AOI images for both PCBA and 17 semiconductor components, offering a more robust and adaptable solution for defect detection," states the paper. Read more he... » read more

Scalable Approach For Fabricating Sub-10nm Nanogaps
By Technical Paper Link - 07 Apr, 2025 - Comments: 0

A new technical paper titled "A progressive wafer scale approach for Sub-10 nm nanogap structures" was published by researchers at Seoul National University, Chung-Ang University, Mohammed VI Polytechnic University and Ulsan National Institute of Science and Technology. "We have advanced the atomic layer lithography method into an efficient, scalable approach for fabricating sub-10 nm nanoga... » read more

Research Bits: Apr. 7
By Jesse Allen - 07 Apr, 2025 - Comments: 0

DNA scaffolds for 3D electronics Researchers from Columbia University, Brookhaven National Laboratory, and University of Minnesota used DNA to help create self-assembled 3D electronic devices with nanometer-size features. The team deposited arrays of gold squares on a surface, onto which they could attach short pieces of DNA. These served as anchors to which they could fasten eight-sided di... » read more

Chip Industry Technical Paper Roundup: Apr. 7
By Linda Christensen - 07 Apr, 2025 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=419 /] Find more semiconductor research papers here. » read more

2030 Data Center AI Chip Winners: The Trillion Dollar Club
By Geoff Tate - 07 Apr, 2025 - Comments: 0

At the start of 2025, I believed AI was overhyped, ASICs were a niche, and a market pullback was inevitable. My long-term view has changed dramatically. AI technology and adoption is accelerating at an astonishing pace. One of the GenAI/LLM leaders, or Nvidia, will be the first $10 Trillion market cap company by 2030. Large language models (LLMs) are rapidly improving in both capability and ... » read more

Side-by-Side Benchmark of NPU Platforms (Imperial College London, Cambridge)
By Technical Paper Link - 05 Apr, 2025 - Comments: 0

A new technical paper titled "Benchmarking Ultra-Low-Power μNPUs" was published by researchers at Imperial College London and University of Cambridge. Abstract "Efficient on-device neural network (NN) inference has various advantages over cloud-based processing, including predictable latency, enhanced privacy, greater reliability, and reduced operating costs for vendors. This has sparked t... » read more

Study Of Multi-Die And Multi-Technology Floorplanning (Texas A&M, Duke)
By Technical Paper Link - 05 Apr, 2025 - Comments: 0

A new technical paper titled "PPAC Driven Multi-die and Multi-technology Floorplanning" was published by Texas A&M University and Duke University. Abstract "In heterogeneous integration, where different dies may utilize distinct technologies, floorplanning across multiple dies inherently requires simultaneous technology selection. This work presents the first systematic study of multi-die ... » read more

Emerging Cybersecurity Risks in Connected Vehicles, With Focus On In-Vehicle and Vehicle-Edge Platforms
By Technical Paper Link - 04 Apr, 2025 - Comments: 0

A new technical paper titled "Security Risks and Designs in the Connected Vehicle Ecosystem: In-Vehicle and Edge Platforms" was published by researchers at Università di Pisa, Ford Motor Company, MIT, and the Institute of Informatics and Telematics (Pisa). Abstract "The evolution of Connected Vehicles (CVs) has introduced significant advancements in both in-vehicle and vehicle-edge platfor... » read more

Thermal Slip Length at a L/S Interface: Power Law Relations From Spatial and Frequency Attributes of the Contact Layer (Caltech)
By Technical Paper Link - 04 Apr, 2025 - Comments: 0

A new technical paper titled "Thermal Slip Length at a Liquid/Solid Interface: Power Law Relations From Spatial and Frequency Attributes of the Contact Layer" was published by researchers at California Institute of Technology, , T. J. Watson Sr. Laboratories of Applied Physics. Abstract "Specialty integrated chips for power intensive tasks like artificial intelligence generate so much heat ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy