Chip Industry Technical Paper Roundup: May 19


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook 🔗 Ghent U., imec Challenges and prospects of 2D electronics for future monolithic CFETs 🔗 SKKU, Hanyang U. et al. A Device-Physics-Informed Artific... » read more

A Deionized Water-Based Large-Scale Transfer Process For 2D Materials Grown on Sapphire (AMO, RWTH, Aixtron)


A new technical paper, "Water-based, large-scale transfer of 2D materials grown on sapphire substrates," was published by researchers at AMO GmbH, RWTH Aachen University, and AIXTRON SE. Abstract "Two-dimensional materials (2DMs) hold significant potential for future electronics, as demonstrated by high-performing devices for sensing, optics, and electronics. However, scalable growth tech... » read more

Evaluating and Calibrating Performance On RISC-V Vector Processors (KTH, LLNL, BSC)


A new technical paper, "Closer in the Gap: Towards Portable Performance on RISC-V Vector Processors," was published by researchers at KTH Royal Institute of Technology, Lawrence Livermore National Laboratory, and Barcelona Supercomputing Center. Abstract "The RISC-V Vector Extension~(RVV) is a cornerstone for supporting compute throughout in scientific and machine learning workloads. Yet ... » read more

Scalable Photomask Optimization With Morphological Learning (SUNY Buffalo, VU, IBM)


A new technical paper, "MorphOPC: Advancing Mask Optimization with Multi-scale Hierarchical Morphological Learning," was published by researchers at University at Buffalo, Villanova University, and IBM T. J. Watson Research Center. Abstract "As feature sizes shrink to the nanometer scale, accurately transferring circuit patterns from photomasks to silicon wafers becomes increasingly chall... » read more

Workflow-Level Design For Trustworthy GenAI Integration in Vehicles (UOL, Denso)


A new technical paper, "Workflow-Level Design Principles for Trustworthy GenAI in Automotive System Engineering," was published by researchers at University of Oldenburg and Denso Automotive. Abstract "The adoption of large language models in safety-critical system engineering is constrained by trustworthiness, traceability, and alignment with established verification practices. We propos... » read more

HW-Native, GPU Compiler for Large-scale ML Production Systems (UC San Diego, Meta)


A new technical paper, "TLX: Hardware-Native, Evolvable MIMW GPU Compiler for Large-scale Production Environments," was published by researchers at UC San Diego and Meta. Abstract "Modern GPUs increasingly rely on specialized hardware units and asynchronous coordination mechanisms, so performance depends on orchestrating data movement, tensor-core computation, and synchronization rather t... » read more

Confusion Grows With More Interconnect Options And Tradeoffs


Key Takeaways: Designers are frequently evaluating 5 or more different interconnects in a single system, each with a distinct purpose. While chip-to-chip (PCIe) and die-to-die (UCIe, BoW) technologies seem to be solving a similar problem, in practice they bring different challenges. PCIe, CXL, NVLink, and UALink are all active in the hyperscaler space, but Ethernet-based technologies... » read more

Micro-Transfer Printing (MTP) As A Promising Scalable Approach to Heterogeneous Integration for Silicon Photonics (Ghent U., imec et al)


A new technical paper, "Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook," was published by researchers at Ghent University, imec et al. Abstract "This paper highlights micro-transfer printing (MTP) as a promising scalable approach to heterogeneous integration for silicon photonics. MTP uniquely achieves high integration density, high throughput, and hig... » read more

Chip Industry Week in Review


Global The U.S. created a licensing path for Nvidia H200 shipments in January and has since approved sales to 10 Chinese companies, but so far no shipments have been confirmed, reports Reuters. With a looming end-of-year expiration, SIA, SEMI, and other business groups are urging Congress to extend the US semiconductor tax credit and expand it to cover semiconductor design and other act... » read more

Why Vision LLMs Force A Rethink Of Edge AI Hardware


As vision-centric large language models move on-device, performance measured in raw TOPS is no longer enough. Architectures need to be built around real workloads, memory behavior, and sustained utilization, especially at the edge. Vision LLMs are changing the edge AI equation For the last decade, most edge AI silicon has been built to do one job extremely well: run convolutional networks for... » read more

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