Board Level Reliability Improvement In eWLB

A look at the benefits of fan-out wafer-level packaging.


When it comes to reducing form-factor and increasing functional integration of mobile devices, Wafer Level Packaging (WLP) is an attractive packaging solution with many advantages in comparison to standard Ball Grid Array (BGA) packages. With the advancement of various fan-out WLP (FOWLP), it is a more optimal and promising solution compared to fan-in WLP because it can offer greater flexibility in design of more Input/Output (I/O) counts, multi-chips, heterogeneous integration and three-dimensional (3D) system-in-package (SiP). Embedded Wafer Level Ball Grid Array (eWLB) is a type of fan-out WLP enabling applications that require smaller form-factor, excellent heat dissipation, and a thin package profile as it has the potential to evolve in various configurations with proven manufacturing capacity and production yield. eWLB is one of key advanced packages because of advantages of higher I/O density, process flexibilities and integration capabilities. It facilitates integration of multiple dies vertically and horizontally in one package without using substrates. The structural design as well as selection of materials becomes more important in determining process yield and long term reliabilities. Therefore, it is necessary to comprehensively investigate the key design factors affecting the reliability.

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