A Bare Wafer Mystery: Inspecting For Back, Edge, And Notch Defects In Advanced Nodes


It is no mystery that the semiconductor industry is always advancing, with specifications becoming increasingly stringent as defects become increasingly more difficult to discover. This is especially true in the case of the most advanced nodes, where ever-smaller flaws and deformities can result in a killer defect. To solve this More than Moore mystery, you do not need to employ the detectiv... » read more

Addressing Trench Structures And Larger Wafers For Power Devices


Wind power. Rail. Solar energy. And, perhaps most significantly, electric and hybrid vehicles. Together, these four forces are among the major demand drivers for power devices. While silicon (Si) still plays a role in power devices, wide-bandgap compound semiconductors like silicon carbide (SiC) and gallium nitride (GaN) are particularly well-suited for power devices thanks to their higher e... » read more

Optimizing Metal Film Measurement On IGBT And MOSFET Power Devices With Picosecond Ultrasonic Technology


By Johnny Dai with Cheolkyu Kim and Priya Mukundhan In recent years, power semiconductor applications have expanded from industrial and consumer electronics to renewable energy and electric vehicles. Looking to the future, the most promising power semiconductor devices will be insulated gate bipolar transistor (IGBT) and power metal oxide semiconductor field effect transistor (power MOSFET) ... » read more

The Glass Substrate Question: When Will It Replace Copper Clad Laminate?


"When will glass replace copper clad laminate on advanced IC substrates?" That’s a question many on the heterogeneous integration (HI) side of the semiconductor industry are asking. Unfortunately, the answer is not straightforward. But before we get to answering that, let’s take an advanced IC substrate (AICS) refresher. In other words, how did we get to the point where glass substrat... » read more

3D NAND Needs 3D Metrology


By Nick Keller and Andy Antonelli You’ve read the reports: the memory market is floundering as the semiconductor industry moves through another scarcity/surplus cycle. Be that as it may, innovation is happening as the industry continues to pursue increasingly higher three-dimensional stacks, with 3D NAND stacks taller than 200 layers entering production. However, there are challenges... » read more

Addressing Copper Clad Laminate Processing Distortion Using Overlay Corrections


All great voyages must come to an end. Such is the case with our series on the challenges facing the manufacturing of advanced IC substrates (AICS), the glue holding the heterogeneous integration ship together. In our first blog, we examined how cumulative overlay drift from individual redistribution layers could significantly increase overall trace length, resulting in higher interconnect res... » read more

Using Advanced Analytics To Meet ESG Goals


With the continued advancement of environmental, social and governance goals, corporations are increasingly focused on reducing their carbon footprints. To accomplish this, these companies are being asked to operate their businesses more efficiently than ever before, whether the matter is reducing waste, water usage or power consumption. This is true for the semiconductor industry as well. A... » read more

Addressing Yield Challenges In Advanced IC Substrate (AICS) Packaging


No matter how you get your news, it seems like everyone is talking about AI – and it’s either going to usher in a new era of productivity or lead to the end of humankind itself. Regardless, the AI era is here, and it’s just beginning to have an impact on our lives, our jobs and our future. To meet the rigorous demands of AI – along with high-performance compute, 5G and electric vehic... » read more

Using Machine Learning To Increase Yield And Lower Packaging Costs


Packaging is becoming more and more challenging and costly. Whether the reason is substrate shortages or the increased complexity of packages themselves, outsourced semiconductor assembly and test (OSAT) houses have to spend more money, more time and more resources on assembly and testing. As such, one of the more important challenges facing OSATs today is managing die that pass testing at the ... » read more

Addressing Total Overlay Drift In Advanced IC Substrate (AICS) Packaging


For years, many in the semiconductor industry have focused on the march toward advanced nodes. As these nodes have decreased in size, the size of input/output (I/O) bumps on the chip has grown smaller. As these bumps shrink, their ability to mate directly to printed circuit boards (PCB) diminishes, which, in turn, leads to the need for an intermediary substrate. Enter the advanced IC substrate ... » read more

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