Meanwhile, 35 Years Later…


At this year’s Design Automation Conference, held on June 3, 4 and 5 in Las Vegas and about 10 miles away from our head office in Las Vegas, Nevada, we celebrated our 35th anniversary with a resounding reaffirmation of our raison d’etre: the provision of verification solutions for some of industry’s most pressing challenges. We had on display a variety of solutions – both hardware ... » read more

Of Aero Shows And Safety


At the end of February, I attended the Aero Show in India - and what a show it was. So many exhibitors from around the world, including all main players from the commercial and military sides of the aerospace industry. Visitors could see everything required to build a modern aircraft: from small components like specialized ICs, cables and connectors up to big parts, such as the jet engines... » read more

Deep Learning Hardware: FPGA vs. GPU


FPGAs or GPUs, that is the question. Since the popularity of using machine learning algorithms to extract and process the information from raw data, it has been a race between FPGA and GPU vendors to offer a HW platform that runs computationally intensive machine learning algorithms fast and efficiently. As Deep Learning has driven most of the advanced machine learning applications, it is r... » read more

Giving Cars A Bird’s-Eye View


Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable of human transportation was built in 1769 [1]! As a person who likes driving, I wouldn’t like to have a ‘fully’ autonomous car, but I would like to get some assistanc... » read more

Accessing Registers With UVM-RAL


As a digital design or verification engineer you know that certain features or configurations of the device can be achieved by programming some registers to set values. For example, a 32-bit register can have several fields within it and each field can represent a particular feature that can be configured. The device then reads that register and uses that information to change settings or modes... » read more

PCIe In High-Performance FPGAs


In today's world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, what are the factors that can assure such performance and speed? The value and success of today’s high performance computing applications in the areas of DNA Sequencing, High Frequency Trading (HFT) and Encryption/Decryption are predicated upon how fast data can be t... » read more

SoC FPGAs And HW/SW Co-Simulation


Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL). This combination allows a system to be architected to provide an optimally balanced single-chip software/hardware solution. However, all too often, the integration between the PS and PL takes place late... » read more

Speeding Up High-Frequency Trading


The High-Frequency Trading (HFT) industry has received a lot of attention during the last few years. HFT is all about speed and minimizing latency: the faster you can run trading strategies and algorithms for analyzing minute price changes and executing trade orders, the higher the probability to win over competition. So the competition in this area is very fierce with market players continuous... » read more

Inside UVM, Take Three


The reason why UVM came up with such phases is because synchronization among all design-testbench was necessary. Using Verilog and VHDL, verification engineers did not have facilities such as clocking block or run phases. Now, it is very important that the time at which test vectors applied from test-bench reaches the Design Under Test(DUT) at the same time. If timing for different signals vari... » read more

Simplifying SystemVerilog Functional Coverage


Let’s say you have a block you need to verify. How do you know that the stimulus you are about to use is exhaustive enough and that you have covered the necessary scenarios/situations to prove it is working correctly? This is where functional coverage comes in. SystemVerilog’s functional coverage constructs allow you to quantify the completeness of your stimulus by recording the values that... » read more

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