Linting RISC-V Designs


As the open-source RISC-V instruction set architecture (ISA) continues to gain momentum, the growing number of RISC-V design solutions and their flexibility creates a problem when choosing the most reliable and robust solution from a number of contenders. Sure, a RISC-V IP design must be compliant to basic ISA standards and should contain a testing suite demonstrating that compliance. But sh... » read more

Setting Up An Embedded Development Board For Cloud-Based IoT Service


Everyday there are new devices appearing in homes, offices, hospitals, factories and thousands of other places that are part of the Internet-of-Things (IoT). Clearly, they need to be connected to the internet and there is a need for a huge amount of raw data to be collected, stored and processed on the cloud. There are many data centers available to store the data. However, only some provide... » read more

Connecting Emulated Designs To Real PCIe Devices


These days verification teams no longer question whether hardware assisted verification should be used in their projects. Rather, they ask at which stage they should start using it. Contemporary System-on-Chip (SoC) designs are already sufficiently complex to make HDL simulation a bottleneck during verification, without even mentioning hardware-software co-verification or firmware and softwa... » read more

Developing 4K Video Projects With FPGAs


Achieving higher resolution is a never-ending race for camera, TV and display manufacturers. After the emergence of 4K ultra high definition (Ultra HD) imaging in the market, it became the main standard for today’s multimedia products. 4K Ultra HD brings us bigger screens which give an immersive feeling. With this standard, the pixilation problem was solved in the big screens. 4K consumers ar... » read more

SoC Co-Emulation Using Zynq Boards


Have you ever worked on a group project where you had to combine your work with that of a colleague of a different engineering discipline but the absence of an efficient means of doing so affected the project’s overall outcome? Well, for software and hardware engineers developing an SoC, the merging of their respective engineering efforts for verification purposes is a big challenge. Early... » read more

Evaluating NVMe SSD Multi-Gigabit Performance


The multi-channel parallelism and low-latency access of NAND flash technology have made Non-Volatile Memory express (NVMe) based SSDs very popular within the main segments of the data storage market, including not only the consumer electronics sector but also data center processing and acceleration services, where the key role is played by specialized FPGA-based hardware for application-specifi... » read more

When Is Robustness Verification Complete?


Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main questi... » read more

Developing Robust Finite State Machines Code With Lint Tools


As design size and complexity grows, the design verification effort grows even more. It takes significant amount of time to thoroughly verify complex control logic of a design, which is the key and the most critical component of design functionality. One of the most common design patterns in the control logic design are finite state machines. They could be designed in different styles, state an... » read more

HW/SW Co-Verification For Hybrid Systems


Heterogeneous SoC architectures such as Zynq have become very popular recently due to the combination of programmable logic (FPGA) and processing system (ARM) integrated into a single chip. Developing a design using such hybrid systems causes complexity in design verification stages. To help address this complexity, Aldec introduced support for QEMU for co-verification in our HES.Proto-AXI host... » read more

Meanwhile, 35 Years Later…


At this year’s Design Automation Conference, held on June 3, 4 and 5 in Las Vegas and about 10 miles away from our head office in Las Vegas, Nevada, we celebrated our 35th anniversary with a resounding reaffirmation of our raison d’etre: the provision of verification solutions for some of industry’s most pressing challenges. We had on display a variety of solutions – both hardware ... » read more

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