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Developing A Real-Time SDR System

Implementing software-defined radio by integrating a tool like GNU Radio with real FPGA hardware and design and verification tools.

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As telecommunication technologies evolve there is an on-going drive for the development of high-performance systems for radio communications. Part of that evolution involves implementing components in software functions that had traditionally been implemented in hardware.

Software-defined radio (SDR) is a prime example. Significant amounts of signal processing have been handed over to the general-purpose processor, opening doors for new opportunities for high-quality signal processing systems.

This blog post presents an example of a system that implements data transmission over an analogue channel with QPSK modulation. Aldec EDA tools and an Aldec HES FPGA board were used to enable the development of real-time digital signal processing applications together with a GNU Radio toolkit.

The main goal of the project described below was to transfer data over an analogue audio channel.

Why involve additional tools in development?

The quickest and easiest method of designing a digital signal processing application is to use a dedicated tool such as GNU Radio. It is a system-level design tool with a powerful library of processing blocks. All blocks can be easily combined using a graphical block diagram editor to make a signal processing application.

GNU Radio is a framework for developing real-time signal processing applications like SDR or other similar solutions running on a general-purpose CPU. Sounds like everything we need. Why would we need more, you may wonder?

Achieving a high data rate is one of the most important objectives in a communication system. However, the CPU can struggle because of the high volume of data and the computationally intensive algorithms in digital signal processing.

So what platform is best for our systems? The answer: FPGA.

An FPGA delivers high performance, supports massive parallelism, is a low power device and is reconfigurable. This means that you can develop your real-time application in an FPGA and enjoy high performance.

So now you might be thinking: OK, so why do we not just use an FPGA?

Designing to target an FPGA is not as simple as it is with GNU Radio. A distinct benefit of GNU Radio is that it has plenty of predefined modules needed to implement the whole application of an SDR. You can build the entire system without necessarily knowing how specific components work. This means you can focus on the top-level functionality you would like to develop.

Building an SDR in an FPGA is more challenging because each element needs to be understood and designed (often from scratch) using HDL languages.

Furthermore, if you have designed one of your components – or even a larger part of your system – and want to test it, then verification requires creating an appropriate HDL simulation environment. This is not a trivial task and may require remodeling many components that are only available in tools like GNU Radio.

Moreover, there are also components of the SDR system without critical timing requirements for which the general-purpose processor is the optimal platform. Such components should remain in the GNU Radio application to avoid time-consuming and expensive reimplementation in FPGA.

How to deal with this challenge?

Thankfully, it is relatively easy to interface GNU Radio with real hardware and with other design and verification tools.

To prove this, GNU Radio was integrated with Aldec’s Riviera-PRO simulator and an Aldec HES FPGA board.

Integration with the simulator allowed us to co-simulate a design partially implemented in HDL language – while the remaining part of the design was still running in GNU Radio. The live communication channel was established between the two tools, and they were able to exchange data on-the-fly. Similar integration was done with the HES FPGA board.

The HES board was a HES-XCVU9P-ZU7EV. It features the HES Proto-AXI interface for integration with other applications and consists of C/C++ API for integration with software applications and an AXI interface for integration with hardware components. Aldec HES boards are easily integrated with GNU Radio as well as various USRPs (Universal Software Radio Peripherals) frequently used with GNU Radio.

In brief, HES Proto-AXI enables the integration between the GNU Radio framework and the HES FPGA board or HDL simulator, creating the perfect environment for design prototyping.


Fig. 1: Aldec environment for design prototyping, integrating HDL simulator, SDR toolkit and FPGA boards.

How to develop my SDR system most effectively?

As mentioned, the best thing to do is to distribute tasks into the CPU processor and the FPGA. The structure of such a system is shown in figure 1. The system consists of an application running on the host workstation. Such an application is developed with the GNU Radio software development toolkit. All the timing critical modules are implemented in FPGA.

The FPGA communicates with ADCs and DACs for interfacing with an analogue radio channel. An audio channel (i.e. not RF) was selected for our project so as to avoid causing interference with local radio communication systems.

All the elements presented in the light blue block in figure 2 represent the USRP hardware component that was created.


Fig. 2: SDR system with USRP.

But how did we design and verify such a complex system partitioned between software and hardware?

This is where Aldec’s solutions came in – with the integration of the HDL simulator, FPGA boards and GNU Radio. The tools provided an efficient and robust environment for design prototyping, which along with other capabilities, enabled communications between the FPGA and the GNU Radio software development toolkit.

SDR application

We proceeded to create our SDR system, with the main goal of the project to transmit over the analogue audio channel with QPSK modulation.

The tools used in the project were:

  • Software:
  • Hardware equipment:
    • Host PC – Linux operating system
    • Aldec HES Prototyping Board – HES-XCVU9P-ZU7EV motherboard
    • Aldec FMC-8xADC-8xDAC daughterboard

The block diagram of the system is shown in figure 3. The output of the DAC was fed back to the ADC’s input to enable verification, i.e. a closed-loop test in which the transmitted and received data should match.

You can also see in figure 3 how the functionality of the SDR system was partitioned between software and FPGA hardware.


Fig. 3: Simplified block diagram of the project.

The QPSK modulator and demodulator with Costas phase-locked loop and DAC/ADC drivers are placed in FPGA.

Also, the GNU Radio application prepares the data for transmission starting with reading the data file, framing the data and performing constellation modulation. The data is sent over HES ProtoAXI to the FPGA where QPSK modulation is performed.

The FPGA drives the DAC converter and sends the analogue signal to the transmission channel. The same FPGA receives samples from the ADC.

The Costas phase-locked loop generates a carrier frequency synchronized with the original carrier used during modulation. The quality of the recovered carrier and the correctness of its phase are essential for demodulating the received signal.

Data received from QPSK demodulation are further processed in the software application. The GNU Radio application performs symbol synchronization, channel equalization, QPSK constellation decoding, and deframing as well as writing the received data to a file.

To enable easy communication between GNU Radio and Aldec’s software and hardware, the custom components were added to the GNU Radio library. To do this you just need to drag and drop the components in GNU Radio to enable communication with Aldec Riviera-PRO simulator or Aldec HES FPGA board.

The components need a few parameters to be configured, a bit file for FPGA configuration or a path to the simulator to work correctly. Similarly, the interface in hardware was wrapped and converted from AXI to AXI Stream. The AXI Stream interface is much easier to use and more suitable for streams of samples.

Application performance

To run the program, we had only to open GNU Radio, specify the location of the file to transfer, and press the execute button. As for the results? The main goal was achieved. Our SDR transmitted files through the audio channel with no bit errors.

Waveforms are shown in figure 4 and 5, and it’s worth flagging here that that’s another advantage of using GNU Radio software; the visualization of signals in real-time.


Fig. 4: QPSK signal waveform taken from the oscilloscope.


Fig. 5: GNU Radio signals visualization in real-time.

Specifications:

  • QPSK modulation
  • 16 kHz carrier
  • 128 kHz sample rate
  • 32 samples per symbol

Note: frequency parameters are limited by audio channel bandwidth.

Future work

My SDR project is ongoing. I just wanted to share, via this blog, the great results so far.

Next, I want to significantly improve the performance of data transmission. This will be done by replacing the modulation method from QPSK to QAM, implementing in the FPGA consecutive elements from GNU Radio (symbol synchronization, channel equalization, etc), and making more use of the ADCs and DACs on the HES daughterboard.



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