Aspinity’s Analog Neural Net Wake-Up Call


Putting an analog chip in front of an always-on system for digitizing speech and having the analog chip listen for sounds of interest may help avoid huge power waste and data congestion in current voice-recognition systems. Aspinity, an analog neuromorphic semiconductor startup, has worked the problem and just announced its Reconfigurable Analog Modular Processor (RAMP) platform yesterday. RAMP... » read more

CEO Outlook: It Gets Much Harder From Here


Semiconductor Engineering sat down to discuss what's changing across the semiconductor industry with Wally Rhines, CEO emeritus at Mentor, a Siemens Business; Jack Harding, president and CEO of eSilicon; John Kibarian, president and CEO of PDF Solutions; and John Chong, vice president of product and business development for Kionix. What follows are excerpts of that discussion, which was held in... » read more

SLAM And DSP Implementation


With the introduction of simultaneous localization and mapping technology, or SLAM, there comes a need for more sophisticated DSPs to handle the required computations. To address this need, Cadence has introduced the Tensilica Vision Q7 DSP to handle the requirements of SLAM, including high performance, low power, and with an ease of development that engineers can leverage to design new and exc... » read more

Driving AI, ML To New Levels On MCUs


One of the most dramatic impacts of technology of late has been the implementation of artificial intelligence and machine learning on small edge devices, the likes of which are forming the backbone of the Internet of Things. At first, this happened through sheer engineering willpower and innovation. But as the drive towards a world of a trillion connected devices accelerates, we must find wa... » read more

IP Requires System Context At 6/5/3nm


Driven by each successive generation of semiconductor manufacturing technology, complexity has reached dizzying levels. Every part of the design, verification and manufacturing is more complicated and intense the more transistors are able to be packed onto a die. For these reasons, the entire system must be taken into consideration as a whole – not just as individual building blocks as could ... » read more

More Memory And Processor Tradeoffs


Creating a new chip architecture is becoming an increasingly complex series of tradeoffs about memories and processing elements, but the benefits are not always obvious when those tradeoffs are being made. This used to be a fairly straightforward exercise when there was one processor, on-chip SRAM and off-chip DRAM. Fast forward to 7/5nm, where chips are being developed for AI, mobile ph... » read more

Week In Review: Design, Low Power


Tools & IP OneSpin Solutions debuted the Hardware Metric Calculation (HMC) App, which uses automatically extracted design information to calculate key hardware metrics to comply with functional safety standards. In particular, it focuses on automotive and autonomous driving SoCs needing to meet the highest functional safety requirements defined by the ISO 26262 standard. The HMC App calcul... » read more

Efficient Low-Cost Implementation of NB-IoT for Smart Applications


NB-IoT is an emerging technology for narrowband wireless communication standardized by 3GPP. It has been designed with a focus on minimizing end-user equipment processing requirements and power consumption to enable the massive deployment of low-cost devices for a broad range of smart applications. This white paper highlights the key challenges of NB-IoT modem design. It proposes a hardware/sof... » read more

Achieving Flexible Processing Requirements For IoT End-Node Devices


The term Internet of Things (IoT), which used to be used broadly to describe almost all connected devices, can now be seen to fall into two segments: Critical IoT and Massive IoT. Critical IoT refers to mission-critical applications such as automotive communication, industrial machines, and medical procedures where low latency is crucial, while Massive IoT is related to the billions of connecte... » read more

Using Memory Differently


Chip architects are beginning to rewrite the rules on how to choose, configure and use different types of memory, particularly for chips with AI and some advanced SoCs. Chipmakers now have a number of options and tradeoffs to consider when choosing memories, based on factors such as the application and the characteristics of the memory workload, because different memory types work better tha... » read more

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