category: Looking Past The Horizon

category: IoT, Security & Automotive

Bold Prediction: 50% Of New HPC Chip Designs Will Be Multi-Die In 2025
By Shekhar Kapoor - 27 Feb, 2025 - Comments: 0

Monolithic chips have been the workhorses behind decades of technological advancement. But just as the industrial revolution saw workhorses replaced with more efficient and powerful machinery, the semiconductor industry is on the cusp of a similar revolution. Multi-die and chiplet-based designs — which integrate multiple specialized dies in a single package or stack integrated circuits ver... » read more

Complete Transistor Level Electrical Checks With Formal Analysis
By Almitra Pradhan - 30 Jan, 2025 - Comments: 0

Nothing is worse for a design team than a chip that fails to work in the bringup lab. Electrical problems are historically a major cause of such failures. Power leaks, power-ground DC paths, missing level shifters, and design flaws such as high fanout lead to unexpected power consumption, incorrect functionality, and even total meltdown. Designers learned years ago that pre-silicon electrical c... » read more

Achieving Successful Multi-Die Signoff
By Vamsi Thatha - 19 Dec, 2024 - Comments: 0

Multi-die designs leveraging 2.5D and 3D technologies are becoming crucial for various electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile devices. These designs allow the integration of dies from different foundries and technology nodes, enhancing density and interconnect speeds beyond traditional discrete dies. However, th... » read more

Successful Design Of Power Management Chips
By Samad Parekh - 26 Nov, 2024 - Comments: 0

With an industry as large as semiconductors, there are often surprises lurking in some of the more specialized product categories. Everyone knows that huge chips such as CPUs and GPUs command high prices and that memory chips are ubiquitous. However, the domain of power management integrated circuits (PMICs) is less well known to many observers. PMICs are impressive in terms of their technol... » read more

Why 40G UCIe IP?
By Aparna Tarde - 31 Oct, 2024 - Comments: 0

AI applications are bringing new challenges to the semiconductor industry. There is an increased demand for greater bandwidth, especially for compute and networking applications to support the high data processing required by deep learning and machine learning algorithms. The requirements for these AI applications are different for die-to-die interfaces. Let’s take 100Tb networking switches a... » read more

Accelerating The Pace And Precision Of AI Chip Innovation
By Stelios Diamantidis - 29 Aug, 2024 - Comments: 0

The Hot Chips 2024 conference, which took place this week in Silicon Valley, was a showcase for AI chip innovation. The three-day program illustrated the race among both established chipmakers and new entrants to explore advanced architectures and embrace novel design solutions to deliver the next breakthrough AI processor. In this article, I share a few “hot takes” from the conference that... » read more

Enhancing RTL Design Efficiency: The Power And Benefits Of Integrated Development Environments
By Eldon Nelson - 25 Jul, 2024 - Comments: 0

In today's rapidly evolving semiconductor design landscape, efficiency and productivity are integral to success. It is here that Integrated Development Environments (IDEs) are making a significant impact. These software suites are much more than programming environments where designers input text or code. They represent a comprehensive ecosystem of tools, utilities, and functionalities, all des... » read more

Enabling 2.5D/3D Multi-Die Package
By Kenneth Larsen - 27 Jun, 2024 - Comments: 1

In the rapidly evolving world of ASIC design, the shift from monolithic to 2.5D and 3D multi-die architectures represents a significant leap forward. This approach, which integrates multiple chiplets (also knowns as dies) into a single package, demands not only a new level of IC design innovation but also an increased complexity in coordination and integration. At the forefront of this technolo... » read more

AI Accelerated Migration Of Existing Designs To New Processors
By Rob van Blommestein - 30 May, 2024 - Comments: 0

In this fast-paced digital age where speed, performance, and time-to-market are king, chip designers are under pressure to deliver high-performance computing that doesn’t compromise power efficiency. The constant demand for instantaneous data processing and sharing is pushing the boundaries of innovation in chip design. With this context, we revisit and revamp the insights from the Synopsys U... » read more

How To Get The Most Out Of Gate-All-Around Designs
By Andrew Appleby - 25 Apr, 2024 - Comments: 0

The semiconductor industry has relied on finFETs, three-dimensional field-effect transistors with thin vertical fins, for many generations of technology. However, the industry is reaching the limits of how much finFETs can be shrunk while maintaining their speed and power benefits, which are crucial for artificial intelligence (AI) and machine learning (ML) applications. The solution is the gat... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy