What “Hamilton – An American Musical” Tickets And Emulation Have In Common


During a recent trip to New York, I managed to see “Hamilton, An American Musical”—despite the running joke about how hard it is to get tickets. The sale of “Hamilton” tickets teaches an interesting lesson about what I would call an “automatic feedback loop of value adjustment”. And believe it or not, it bears some resemblance to how verification users actually choose what engine ... » read more

An Easier Path To Faster C With FPGAs


For most scientists, what is inside a high-performance computing platform is a mystery. All they usually want to know is that a platform will run an advanced algorithm thrown at it. What happens when a subject matter expert creates a powerful model for an algorithm that in turn automatically generates C code that runs too slowly? FPGA experts have created an answer. More and more, the genera... » read more

Constructing The Pillars Of The ARM HPC Ecosystem


In talking with HPC users at SC15 following the announcement of the OpenHPC project, I consistently heard that while they valued having a common open source framework covering a baseline set of HPC codes, they wanted to see more than one chip architecture represented. This is important when you consider that many HPC users are focused on getting to exascale computing for future supercomputer de... » read more

Executive Committee Members You Need To Know…


Time is the only critic without ambition. – John Steinbeck Like many things, DAC looks decidedly different depending on where you sit, and how you experience it. As an attendee, it’s mostly a few days at the start of every summer where you can sample some of the best technical content on the design of circuits and systems, plus get the chance to network and have some fun with a worldwide... » read more

Fast, Accurate, And Standards-Based


Unlike the loosely timed models used for software development, which rely on a high level of abstraction to simulate as fast as possible, the communication between the architecture models in a virtual prototype for early performance analysis requires timing to be modeled more accurately. This tradeoff can seem like a big leap to some, spanning the gap from SystemC TLM-2.0 LT (loosely timed) ... » read more

The Battle To Embed The FPGA


There have been many attempts to embed an [gettech id="31071" comment="FPGA"] into chips in the past, but the market has failed to materialize—or the solutions have failed to inspire. An early example was [getentity id="22924" comment="Triscend"], founded in 1997 and acquired by [getentity id="22839" e_name="Xilinx"] in 2004. It integrated a CPU—which varied from an [getentity id="22186" co... » read more

Security Becomes A Multi-System Issue


The fallout from the Mirai malware attack last week was surprising, given that it was published on the Internet several months ago as open-source. Despite numerous warnings, it still managed to cause denial of service attacks at Amazon, Netflix, and a slew of other companies that are supposed to be able to fend off these kinds of attacks. The good news is that it more people talking about th... » read more

IoT – And A Tear In The Fabric Of The Connected World


Billions of connected things. Massive silicon consumption. Exponentially rising data volumes. Global compute farm build-out to make sense out of all of it. Lots of dollar signs. Everyone is talking about IoT with an optimistic view toward the future. There is a dark side to all this. Many, including yours truly have written about it. If you’re familiar with the Terminator series, you can call... » read more

OSDN – On-chip Software Defined Network


You must be mumbling to yourself, “Oh no, not another NoC article! The term NoC is used so loosely in the industry and everybody seem to be claiming they have one, so what more is there to say?” Fair enough, but please indulge me. Actually, there are some wannabe NoCs out there, but very few actually provide a full-fledged network. I submit, a real NoC should implement all the same key d... » read more

DVCon Europe: 2 Days Of Verification Presentations To Enthusiastic Attendees


Design verification was on full display last week in Munich, Germany, as DVCon Europe offered two full days of more than 30 sessions. Attendees could choose from 16 tutorials, two panels, three keynotes and 16 technical presentations or wander through a small but active exhibit floor, with exhibitors that included OneSpin. The conference for engineers by engineers is meant to be educational,... » read more

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