Validation Of Smart Sensors For AI-Based Condition Monitoring In Industry


By André Schneider and Martin Lehmann Industry has challenging requirements for the quality and reliability of the distributed smart sensors used in condition monitoring. As a result of digitalization and the increasing use of AI-based monitoring solutions, we can expect an increase in demand for systematic, efficient design and validation processes. In the future, a product’s journey fro... » read more

Temperature: A Growing Concern For Chip Security Experts


While everyone in the semiconductor industry wants to have the hottest new product, having that type of temperature manifest in a literal sense poses a threat not just to product stability and performance but to the security of the chips themselves. Temperature has become an object of fascination to security researchers due to the vagaries of how the physical properties of heat affect perfor... » read more

KANs Explode!


In late April 2024, a novel AI research paper was published by researchers from MIT and CalTech proposing a fundamentally new approach to machine learning networks – the Kolmogorov Arnold Network – or KAN. In the six weeks since its publication, the AI research field is ablaze with excitement and speculation that KANs might be a breakthrough that dramatically alters the trajectory of AI mod... » read more

Understanding Scandump: A Key Silicon Debugging Technique


Scandump is an advanced silicon debugging technique that ingeniously repurposes DFT (Design For Testability) scan chains for functional debugging. This method allows for the extraction of states from registers or latches that are stitched into the scan chains, providing critical diagnostic insights. Scandump is particularly invaluable when the CPU is deadlocked or when the system hardware bec... » read more

New Approaches Needed For Power Management


Power is becoming a bigger concern as the amount of data being processed continues to grow, forcing chipmakers and systems companies to rethink compute architectures from the end point all the way to the data center. There is no simple fix to this problem. More data is being collected, moved, and processed, requiring more power at every step, and more attention to physical effects such as he... » read more

PCIe 7.0 Takes Center Stage At PCI-SIG DevCon ’24


From the simplest building blocks like GPIOs to the most advanced high-speed interfaces, IP subsystems are the lifeblood of the chipmaking ecosystem. A key enabler for IP has been the collaboration between industry and academia in the creation of standards and protocols for interfaces. PCI-SIG drives some of the key definitions and compliance specifications and ensures the interoperability of i... » read more

When To Expect Domain-Specific AI Chips


The chip industry is moving toward domain-specific computation, while artificial intelligence (AI) is moving in the opposite direction, creating a gap that could force significant changes in how chips and systems are architected in the future. Behind this split is the amount of time it takes to design hardware and software. In the 18 months since ChatGPT was launched on the world, there has ... » read more

A High-Capacity Solution for Power and Signal Integrity on 2.5D Silicon Interposers


The present trends in technology — such as increasing demand for computational power from CPUs and GPUs, connectivity driven by Internet of Things (IoT), data demands around connected and self-driving cars, and the design of processors optimized for artificial intelligence (AI) — require more functionality from integrated circuits. As designers struggle to find ways to scale with complexity... » read more

How Does Reclaiming Data Center Lost Capacity Result in Return on Investment?


As the importance of data center performance, efficiency, and sustainability grows, owners and operators must move beyond “quick fixes” when managing their data center and IT deployments. These temporary solutions are neither effective nor sustainable. Long-term solutions and effective management over time are required to achieve meaningful efficiency gains. Capacity planning is one such di... » read more

Testing PCI Express 5.0 PHY Transmitter Performance Without Analysis Software


PCI Express (PCIe) 5.0 silicon characterization across process, voltage, and temperature variations, is necessary for accelerating SoC designs. To measure key qualifying parameters, designers and test engineers must have a good understanding of the PCIe 5.0 base electrical specification and know the physical layer’s design architecture and features for accurate characterization of 32GT/s PHY ... » read more

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