Challenges Grow For Creating Smaller Bumps For Flip Chips

By Anne Meixner - 18 May, 2023 - Comments: 0

New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

Managing Yield With EUV Lithography And Stochastics

By Katherine Derbyshire - 18 May, 2023 - Comments: 1

Identifying issues that actually affect yield is becoming more critical and more difficult at advanced nodes, but there is progress. Although they are closely related, yield management and process control are not the same. Yield management seeks to maximize the number of functioning devices at the end of the line. Process control focuses on keeping each individual device layer within its des... » read more

Next Gen Laser Assisted Bonding (LAB) Technology

By SeokHo Na - 18 May, 2023 - Comments: 0

In the semiconductor market, there are many applications including smartphone, tablets, central processing units (CPUs), artificial intelligence (AI), data cloud and more that are expecting rapid growth. Among them, CPU data processing, AI and data cloud require much higher power consumption than smart phones or tablets. For the higher power applications, Flip Chip ball grid array (FCBGA) or 2.... » read more

The Impact Of Metal Gate Recess Profile On Transistor Resistance And Capacitance

By Pradeep Nanja - 18 May, 2023 - Comments: 0

In logic devices such as finFETs (field-effect transistors), metal gate parasitic capacitance can negatively impact electrical performance. One way to reduce this parasitic capacitance is to optimize the metal gate recess dimensions. However, there are limits to reducing this capacitance if you simply remove more of the metal material, since this can modify capacitance unexpectedly through chan... » read more

Reflections On Photomask Japan 2023: Embracing The Era Of Curvilinear Masks

By Seiji Nagahara - 18 May, 2023 - Comments: 0

In April, 2023, I had the privilege of participating in Photomask Japan 2023 (PMJ2023), a web conference that brought together experts and enthusiasts in the field. The conference commenced with an enlightening keynote talk by Dr. Kurt Ronse of imec on the status and challenges of the high NA EUV ecosystem, presenting roadmaps for the introduction of high NA EUV. I would like to express my grat... » read more

Enabling New Functionality In Medtech And Biotech Devices

By Dick Otte - 18 May, 2023 - Comments: 0

Medtech and biotech devices are uniquely suited to benefit from emerging electronic capabilities – specifically, the kind of electronics design, packaging and assembly offerings that are Promex’s specialty. With that said, these markets present a variety of manufacturing challenges and demands that require heterogeneous integration (HI) to address. This two-part blog post provides a high... » read more

MEMS & Sensors Market Forecast: Impact Of Semiconductor Industry Slowdown

By Timothy Brosnihan - 18 May, 2023 - Comments: 0

Of all technologies, MEMS and sensors stand out for their far-reaching promise to improve lives across segments such as Internet of Things (IoT), wearables, smart home, digital health, precision agriculture, autonomous vehicles, robotics, and environmental monitoring. Little wonder, then, that the growth of the MEMS and sensor design and manufacturing industry is among the hottest topics at ... » read more

Breaking The 1M RAID5 Write IOPS Barrier

By Samsung - 17 May, 2023 - Comments: 0

In today’s data-centric age, enormous amounts of data are generated, stored and processed at an unprecedented rate. Businesses are utilizing this data to make better decisions, drive greater efficiencies, develop more desirable products, improve profitability and ultimately increase user satisfaction. To continue deriving a high degree of value from a rapidly-expanding data flow, today’s en... » read more

Photonic Debond: Scalability And Advancements

By Brewer Science - 17 May, 2023 - Comments: 0

Advanced packaging technology has continuously evolved over the past 10-20 years to become a major driving force in improving integrated circuit (IC) performance. This improvement in IC performance is assisted by the ability to place specialized components near each other for shorter interconnects in the IC packages. Temporary bond and debond (TB/DB) is an enabling technique for this work. TB/D... » read more

Challenges In Packaging 5G And 6G

By Ed Sperling - 16 May, 2023 - Comments: 0

Millimeter wave frequencies are essential for transferring more data more quickly, but they also require different packaging technology to minimize loss and drift. That opens up a number of tradeoffs around antenna in package, antenna on package, flexible circuits, and different substrates. Curtis Zwenger, vice president of R&D at Amkor Technology, talks about a host of new challenges rangi... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

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