Blog Review: Mar. 27


Cadence's Steve Brown suggests that multi-die technologies will be a key part of the path toward a faster, more efficient chip ecosystem that can support the compressed development cycles now emerging in the automotive industry. Synopsys' John Swanson, Madhumita Sanyal, and Priyank Shukla point to the role of simulation in ensuring seamless operation in the Ethernet ecosystem though rigorous... » read more

Chip Industry Week In Review


By Adam Kovac, Gregory Haley, and Liz Allan. The U.S. government released a 61-page report, titled "National Strategy on Microelectronics Research,” by the Subcommittee On Microelectronics Leadership. It provides a framework for government, industry, academia, and international allies to address four major goals. Synopsys  acquired Intrinsic ID, which develops physical unclonable func... » read more

Blog Review: March 20


Synopsys' Kiran Vittal delves into AI chips, including the expansion of chip design beyond traditional semiconductor companies, adoption of RISC-V, and the use of formal equivalence checking to verify complex AI datapaths. Siemens' Patrick McGoff points to a survey that suggests projects deploying design for manufacturing within a PCB design flow are more likely to be completed on-time, on-q... » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. Europe's semiconductor footprint is growing in areas that previously had little association with chips. Silicon Box plans to build a panel-level foundry in northern Italy, funded in part by the Italian government. The deal is worth around €3.2 billion ($3.6B). In addition, imec will establish a specialized 300mm chip technology pilot line in M... » read more

Blog Review: Mar. 13


Cadence's Geeta Arora explains the Address Translation Service in PCIe 6.0, which allows an I/O device to perform its own virtual to physical address translations without relying on the host's CPU to reduce latency and improve overall system performance. Synopsys' John Swanson, Jon Ames, Priyank Shukla, and Varun Agrawal highlight the upcoming 1.6T iteration of the Ethernet standard and the ... » read more

Chip Industry Week In Review


By Adam Kovac, Gregory Haley, and Liz Allan. Cadence plans to acquire BETA CAE Systems for $1.24 billion, the latest volley in a race to sell multi-physics simulation and analysis across a broad set of customers with deep pockets. Cadence said the deal opens the door to structural analysis for the automotive, aerospace, industrial, and health care sectors. Under the terms of the agreement, 6... » read more

Blog Review: Mar. 6


Synopsys' Gandharv Bhatara notes that successfully deploying high-NA EUV will rely on computational lithography to provide accurate modeling of aberrations, compact 3D mask modeling, and expand inverse lithography to full-chip processing. Cadence's John Park argues for using a systematic and automated system for co-design and co-analysis of multi-die packages to reduce the margin for human e... » read more

Chip Industry Week In Review


By Adam Kovac, Karen Heyman, and Liz Allan. India approved the construction of two fabs and a packaging house, for a total investment of about $15.2 billion, according to multiple sources. One fab will be jointly owned by Tata and Taiwan's Powerchip. The second fab will be a joint investment between CG Power, Japan's Renesas Electronics, and Thailand's Stars Microelectronics. Tata will run t... » read more

Blog Review: Feb. 28


Synopsys' Emilie Viasnoff suggests that employing virtual sensors when developing an autonomous driving system helps aid in sensor design and minimizes the hazards associated with extensive real-world driving. Cadence's Anthony Ducimo introduces a methodology for embedded BootROM verification that relies only on standard RTL verification toolchains to reveal bugs, identify unused sections of... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Intel officially launched Intel Foundry this week, claiming it's the "world's first systems foundry for the AI era." The foundry also showed off a more detailed technology roadmap down to expanded 14A process technology. Intel CEO Pat Gelsinger noted the foundry will be separate from the chipmaker, utilize third-party chiplets and IP, and leverage... » read more

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