Scaling At The Angstrom Level

By Ed Sperling - 16 Apr, 2020 - Comments: 0

It now appears likely that 2nm will happen, and possibly the next node or two beyond that. What isn't clear is what those chips will be used for, by whom, and what they ultimately will look like. The uncertainty isn't about the technical challenges. The semiconductor industry understands the implications of every step of the manufacturing process down to the sub-nanometer level, including ho... » read more

Is It Time To Decentralize The Supply Chain?

By Ed Sperling - 19 Mar, 2020 - Comments: 0

One of the key requirements in any engineered system is a backup plan. A single point of failure in safety-critical or mission-critical applications can lead to disaster, whether that involves a smart phone, a car, a bridge, an airplane, or a design, manufacturing or business process. So why has this been largely ignored across the semiconductor manufacturing supply chain? The answer is comp... » read more

The Risk Of Two Supply Chains

By Ed Sperling - 20 Feb, 2020 - Comments: 0

Ever since the Trump administration weaponized trade restrictions against individual companies — first ZTE, then Huawei — China has begun developing a second supply chain for electronics. Inside of China, this is viewed as a necessary step for survival. In April 2018, the U.S. government banned ZTE from sourcing U.S. components for seven years, nearly putting that company out of business... » read more

Is This The Year Of The Chiplet?

By Ed Sperling - 23 Jan, 2020 - Comments: 2

Customizing chips by choosing pre-characterized — and most likely hardened IP — from a menu of options appears to be gaining ground. It's rare to go to a conference these days without hearing chiplets being mentioned. At a time when end markets are splintering and more designs are unique, chiplets are viewed as a way to rapidly build a device using exactly what is required for a particul... » read more

Scaling, Packaging, And Partitioning

By Ed Sperling - 17 Dec, 2019 - Comments: 0

Prior to the finFET era, most chipmakers either focused on shrinking or packaging, but they rarely did both. Going forward, the two will be inseparable, and that will lead to big challenges with partitioning of data and processing. The key driver here, of course, is that device scaling no longer provides appreciable benefits in power, performance and cost. Nevertheless, scaling does provide ... » read more

Is There A Crossover Point For Mainstream Anymore?

By Ed Sperling - 21 Nov, 2019 - Comments: 0

Until 28nm, it was generally assumed that process nodes would go mainstream one or two generations after they were introduced. So by the time the leading edge chips for smartphones and servers were being developed at 16/14nm and 10/7nm, it was assumed that developing a chip at 28nm would be less expensive, less complex, and that the process rule deck would shrink. That worked for decades. Th... » read more

Who’s Watching The Supply Chain?

By Ed Sperling - 17 Oct, 2019 - Comments: 0

Every company developing chips at the most advanced process nodes these days is using different architectures and heterogeneous processing and memory elements. There simply is no other way to get the kind of power/performance improvements needed to justify the expense of moving to a new process node. So while they will reap the benefits of traditional scaling, that alone is no longer enough. ... » read more

Stacking Memory On Logic, Take Two

By Ed Sperling - 19 Sep, 2019 - Comments: 1

True 3D-ICs, where a memory die is stacked on top of a logic die using through-silicon vias, appear to be gaining momentum. There are a couple reasons why this is happening, and a handful of issues that need to be considered before even seriously considering this option. None of this is easy. On a scale of 1 to 10, this ranks somewhere around 9.99, in part because the EDA tools needed to rem... » read more

Why Scaling Must Continue

By Ed Sperling - 15 Aug, 2019 - Comments: 3

The entire semiconductor industry has come to the realization that the economics of scaling logic are gone. By any metric—price per transistor, price per watt, price per unit area of silicon—the economics are no longer in the plus column. So why continue? The answer is more complicated than it first appears. This isn't just about inertia and continuing to miniaturize what was proven in t... » read more

The Danger Of Twin Supply Chains

By Ed Sperling - 18 Jul, 2019 - Comments: 0

No matter how the ongoing dispute between the United States and China turns out, damage already has been done. It's not the kind of damage that is immediately visible to the outside world. It's more of the long-term, policy-shift kind of problem, which over time will likely prove much worse. Many executives have termed recent sanctions on Huawei and other Chinese companies "China's Sputnik m... » read more

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Knowledge Centers
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