Chip Industry Technical Paper Roundup: Oct. 14


New technical papers recently added to Semiconductor Engineering’s library: [table id=367 /] More Reading Chip Industry Week In Review AI CPU chiplet platform; Intel-AMD pact; GDDR7 DRAM; AI-RFIC funding; CHIPS Act awards; NoC tiling; thermal modeling on chiplets; $900M nuclear tech and more. Technical Paper Library home » read more

Research Bits: Oct. 14


Si-photonics chip emits beam of light MIT researchers developed a miniature, chip-based “tractor beam” that could help scientists study DNA, classify cells, and investigate the mechanisms of disease. The device uses a beam of light emitted by a silicon-photonics chip to manipulate particles millimeters away from the chip surface, while the sample remains sterile under its glass cover. T... » read more

Research Bits: Oct. 8


Soft, flexible polymer semiconductors Stanford University materials scientists used a specialized electron microscope – cryo-electron microscopy (Cryo 4D-STEM) – to explore the microstructure of soft semiconductors that could lead to new-generation electronics. Organic mixed ionic-electronic conductors (OMIECs) are soft, flexible polymer semiconductors with promising electrochemical qua... » read more

Chip Industry Technical Paper Roundup: Oct. 8


New technical papers recently added to Semiconductor Engineering’s library: [table id=365 /] More ReadingTechnical Paper Library home » read more

Research Bits: Oct. 1


Rust-resistant coating for 2D semiconductors Researchers from Pennsylvania State University, National Yang Ming Chiao Tung University in Taiwan, Purdue University, Intel, and the Kurt J. Lesker Company developed a synthesis process to produce a rust-resistant coating with properties ideal for creating faster, more durable electronics. "One of the biggest issues that we see in 2D semiconduct... » read more

Chip Industry Technical Paper Roundup: Oct. 1


New technical papers recently added to Semiconductor Engineering’s library: [table id=360 /] More ReadingTechnical Paper Library home » read more

Research Bits: Sept. 24


Modeling negative capacitance Researchers from Lawrence Berkeley National Laboratory developed an open-source 3D simulation framework capable of modeling the atomistic origins of negative capacitance in ferroelectric thin films at the device level. When a material has negative capacitance, it can store a greater amount of electrical charge at lower voltages. The team believes the FerroX fra... » read more

Chip Industry Technical Paper Roundup: Sept. 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=358 /] More ReadingTechnical Paper Library home » read more

Research Bits: Sept. 17


DNA data storage plus compute Researchers from North Carolina State University and Johns Hopkins University created a DNA-based device that can perform both data storage and computing functions. “Specifically, we have created polymer structures that we call dendricolloids – they start at the microscale, but branch off from each other in a hierarchical way to create a network of nanoscal... » read more

Chip Industry Technical Paper Roundup: Sept. 17


New technical papers recently added to Semiconductor Engineering’s library: [table id=356 /] More ReadingTechnical Paper Library home » read more

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