category: Round Tables

category: IoT, Security & Automotive

Are Simulation’s Days Numbered?
By Brian Bailey - 06 Apr, 2016 - Comments: 3

Semiconductor Engineering sat down to discuss the limitations of simulation in more complex designs with [getperson id="11049" comment="Michael McNamara"], CEO of [getentity id="22716" comment="Adapt-IP”]; Pete Hardee, product management director at [getentity id="22032" e_name="Cadence"]; David Kelf, vice president of marketing for [getentity id="22395" e_name="OneSpin Solutions"]; Lauro Riz... » read more

Where Is Next-Gen Lithography?
By Mark LaPedus - 31 Mar, 2016 - Comments: 2

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Are Simulation’s Days Numbered?
By Brian Bailey - 24 Mar, 2016 - Comments: 0

In the latest EDAC report, the value of IP surpassed the value of CAE tools for the first time. Verification tools are an important part of establishing confidence in IP blocks and simulation has been the mainstay of that IP verification strategy. But simulation is under increasing pressure, particularly for full-chip and SoC verification, because it has failed to scale. While it still remains ... » read more

Where Is Next-Gen Lithography?
By Mark LaPedus - 17 Mar, 2016 - Comments: 4

Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Upcoming Hurdles For The Semiconductor Industry
By Ann Mutschler - 01 Feb, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys-Apache; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael... » read more

What Goes Wrong With IP
By Ed Sperling - 11 Jan, 2016 - Comments: 0

Semiconductor Engineering sat down to talk about the future of IP with Rob Aitken, R&D fellow at [getentity id="22186" comment="ARM"]; Mike Gianfagna, vice president of marketing at [getentity id="22242" e_name="eSilicon"]; Judd Heape, vice president of product applications at Apical; and Bernard Murphy, an independent industry consultant. What follows are excerpts of that discussion, which... » read more

Verification Grows Up
By Brian Bailey - 05 Jan, 2016 - Comments: 2

Semiconductor Engineering sat down with a group of verification experts to see how much progress has been made in solving issues associated with the profession. Panelists included Mike Baird, President of Willamette HDL; Jin Zhang, VP marketing and customer relations for [getentity id="22147" comment="Oski Technology"] and Lauro Rizzatti, a marketing consultant and previously the general manage... » read more

What Goes Wrong With IP
By Ed Sperling - 31 Dec, 2015 - Comments: 0

Semiconductor Engineering sat down to talk about the future of IP with Rob Aitken, R&D fellow at [getentity id="22186" comment="ARM"]; Mike Gianfagna, vice president of marketing at [getentity id="22242" e_name="eSilicon"]; Judd Heape, vice president of product applications at Apical; and Bernard Murphy, an independent industry consultant. What follows are excerpts of that discussion, which... » read more

Upcoming Hurdles For The Semiconductor Industry
By Ann Mutschler - 30 Dec, 2015 - Comments: 1

Semiconductor Engineering sat down to discuss upcoming challenges and hurdles to overcome for the semiconductor industry with Vic Kulkarni, senior vice president and general manager, RTL Power Business at Ansys; Chris Rowen, Fellow and CTO, IP Group at Cadence; Subramani Kengeri, vice president, Global Design Solutions at GLOBALFOUNDRIES; Simon Davidmann, CEO of Imperas Software; Michael Buehle... » read more

Defining Sufficient Coverage
By Brian Bailey - 28 Dec, 2015 - Comments: 0

Semiconductor engineering sat down to discuss the definition of sufficiency of coverage as a part of verification closure with Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Willard Tu, director of embedded segment marketing for [getentity id="22186" comment="ARM"]; Larry Vivolo was, at the time of this roundtable, senior director of product marketing for [get... » read more

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