Toward Domain-Specific EDA


More companies appear to be creating custom EDA tools, but it is not clear if this trend is accelerating and what it means for the mainstream EDA industry. Whenever there is change, there is opportunity. Change can come from new abstractions, new options for optimization, or new limitations that are imposed on a tool or flow. For example, the slowing of Moore's Law means that sufficient prog... » read more

Designing For Thermal


Heat has emerged as a major concern for semiconductors in every form factor, from digital watches to data centers, and it is becoming more of a problem at advanced nodes and in advanced packages where that heat is especially difficult to dissipate. Temperatures at the base of finFETs and GAA FETs can differ from those at the top of the transistor structures. They also can vary depending on h... » read more

MicroLEDs Move Toward Commercialization


The market for MicroLED displays is heating up, fueled by a raft of innovations in design and manufacturing that can increase yield and reduce prices, making them competitive with LCD and OLED devices. MicroLED displays are brighter and higher contrast than their predecessors, and they are more efficient. Functional prototypes have been developed for watches, AR glasses, TVs, signage, and au... » read more

Big Changes In Architectures, Transistors, Materials


Chipmakers are gearing up for fundamental changes in architectures, materials, and basic structures like transistors and interconnects. The net result will be more process steps, increased complexity for each of those steps, and rising costs across the board. At the leading-edge, finFETs will run out of steam somewhere after the 3nm (30 angstrom) node. The three foundries still working at th... » read more

AI Power Consumption Exploding


Machine learning is on track to consume all the energy being supplied, a model that is costly, inefficient, and unsustainable. To a large extent, this is because the field is new, exciting, and rapidly growing. It is being designed to break new ground in terms of accuracy or capability. Today, that means bigger models and larger training sets, which require exponential increases in processin... » read more

Where Are The Autonomous Cars?


Are we there yet? Governments, consumers, and engineers alike want to know how close the automotive world is to producing a fully autonomous Level 5 vehicle. While some experts say such vehicles could hit the road in the next few years, they're a shrinking minority. Most forecasts say a truly self-driving car is at least a decade away — and maybe much longer, because it requires disruptive... » read more

Scaling, Advanced Packaging, Or Both


Chipmakers are facing a growing number of challenges and tradeoffs at the leading edge, where the cost of process shrinks is already exorbitant and rising. While it's theoretically possible to scale digital logic to 10 angstroms (1nm) and below, the likelihood of a planar SoC being developed at that nodes appears increasingly unlikely. This is hardly shocking in an industry that has heard pr... » read more

Near-Threshold Computing Gets A Boost


Near-threshold computing has long been used for power-sensitive devices, but some surprising, unrelated advances are making it much easier to deploy. While near-threshold logic has been an essential technique for applications with the lowest power consumption, it always has been difficult to use. That is changing, and while it is unlikely to become a mainstream technique, it is certainly bec... » read more

Hybrid Bonding Moves Into The Fast Lane


The industry’s unquenchable thirst for I/O density and faster connections between chips, particularly logic and cache memory, is transforming system designs to include 3D architectures, and hybrid bonding has become an essential component in that equation. Hybrid bonding involves die-to-wafer or wafer-to-wafer connection of copper pads that carry power and signals and the surrounding diele... » read more

Keeping IC Packages Cool


Placing multiple chips into a package side-by-side can alleviate thermal issues, but as companies dive further into die stacking and denser packaging to boost performance and reduce power, they are wrestling with a whole new set of heat-related issues. The shift to advanced packaging enables chipmakers to meet demands for increasing bandwidth, clock speeds, and power density for high perform... » read more

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