Blog Review: Apr. 16


Siemens’ Tova Levy finds that heterogeneous integration necessitates a shift to a system-level technology co-optimization approach where power, performance, area, cost, and reliability are considered across various components, including silicon, package, interposer, and PCB. Synopsys’ Greg Sorber listens in as Arm’s Rene Haas and Synopsys’ Sassine Ghazi discuss the opportunity for AI... » read more

AI Agents Need Goals


Experts At The Table: Definitions and goals matter when it comes to using AI effectively, and it has to be tightly reined in to be effective. Semiconductor Engineering sat down with a panel of experts to discuss these issues and others, including Johannes Stahl, senior director of product line management for the Systems Design Group at Synopsys; Michael Young, director of product marketing for ... » read more

Startup Funding: Q1 2025


The first quarter of 2025 saw six companies raise at least $100 million in investment. Of those, three went to quantum hardware companies, with major investment into neutral atom, superconducting, and hybrid quantum control approaches. AI chips and enabling technology were another big winner in the quarter, with companies developing optical communications tech for chips and data center infra... » read more

Blog Review: Apr. 2


Synopsys’ Meenakshy Ramachandran explores how DisplayPort Automotive Extensions help meet functional safety and security standards for the increasingly higher-resolution and more immersive in-vehicle displays in connected, autonomous, shared, and electric vehicles. Siemens’ Gabriella Leone and Michael Munsey discuss the need for a collaborative semiconductor business platform and how to ... » read more

Times Are Changing For EDA


The EDA industry is about 50 years old, and I see the people responsible for its first generation setting their LinkedIn employment status to 'retired, at home' almost daily. I, for one, have a foot in that camp, but reporting/writing is different than having a full-time job because I can control the time commitment. We have seen many serial entrepreneurs who have created several successful com... » read more

How AI And Connected Workflows Will Close The Verification Bottleneck


For decades, verification has been the unsung hero of chip development—quietly catching bugs before they reach silicon. But as semiconductor complexity has skyrocketed, verification has turned into the bottleneck of development cycles. This challenge has a name: Verification Productivity Gap 2.0. Back in the early 2000s, the Verification Productivity Gap 1.0 emerged when design complexi... » read more

High-Speed High-Capacity Mixed-Signal Simulation Of Silicon Photonics


Many of today’s computing and communications applications demand almost unimaginable processing capability and high-bandwidth access to memory. For example, many data center systems using high-end Graphics Processing Units (GPUs) often need to transfer multiple terabytes per second. Traditional copper-based interconnects, limited to speeds of hundreds of megabits per second (Mbps), cannot ... » read more

Unleashing AI Potential Through Advanced Chiplet Architectures


The rapid proliferation of machine-generated data is driving unprecedented demand for scalable AI infrastructure, placing extreme pressure on compute and connectivity within data centers. As the power requirements and carbon footprint of AI workloads rise, there is a critical need for efficient, high-performance hardware solutions to meet growing demands. Traditional monolithic ICs will not sca... » read more

Innovating For 6G


As the world eagerly anticipates the arrival of applicable 6G innovations, researchers face numerous challenges in validating this next-generation wireless communication technology. The journey from theoretical concepts and mathematical equations to real-world 6G implementation is complex and requires meticulous planning, testing, and measurements to better characterize these ultra-high freque... » read more

Challenges In Managing Chiplet Resources


Managing chiplet resources is emerging as a significant and multi-faceted challenge as chiplets expand beyond the proprietary designs of large chipmakers and interact with other elements in a package or system. Poor resource management in chiplets adds an entirely new dimension to the usual power, performance, and area tradeoffs. It can lead to performance bottlenecks, because as chiplets co... » read more

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