category: System-Level Design

category: IoT, Security & Automotive

Blog Review: Dec. 6
By Jesse Allen - 06 Dec, 2023 - Comments: 0

Cadence's Vinod Khera checks out potential implications of generative AI for EDA, including how it could increase the learning rate of students and reduce the rising verification cost. Synopsys' Kiran Vittal considers the driving factors behind RISC-V's growth and why it is becoming increasingly important for applications ranging from automotive to 5G mobile, AI, and data centers. Siemens... » read more

AI Accelerator Architectures Poised For Big Changes
By Ann Mutschler - 04 Dec, 2023 - Comments: 5

AI is driving a frenzy of activity in the chip world as companies across the semiconductor ecosystem race to include AI in their product lineup. The challenge now is how to make AI run faster, use less energy, and to be able to leverage it from the edge to the data center — particularly with the rollout of large language models. On the hardware side, there are two main approaches for accel... » read more

The Good Old Days Of EDA
By Brian Bailey - 30 Nov, 2023 - Comments: 5

Nostalgia is wonderful, but there is something about being involved in the formative years of an industry. Few people ever get to experience it, and it was probably one of the most fortuitous events to have happened in my life. Back in the early '80s, little in the way of design automation existed. There were a few gate- and transistor-level simulators, primarily for test and a few 'calculators... » read more

System State Challenges Widen
By Brian Bailey - 30 Nov, 2023 - Comments: 0

Knowing the state of a system is essential for many analysis and debug tasks, but it's becoming more difficult in heterogeneous systems that are crammed with an increasing array of features. There is a limit as to how many things engineers can keep track of, and the complexity of today's systems extends far beyond that. Hierarchy and abstraction are used to help focus on the important aspect... » read more

EDA Pushes Deeper Into AI
By Karen Heyman - 30 Nov, 2023 - Comments: 0

EDA vendors are ramping up the use of AI/ML in their tools to help chipmakers and systems companies differentiate their products. In some cases, that means using AI to design AI chips, where the number and breadth of features and potential problems is exploding. What remains to be seen is how well these AI-designed chips behave over time, and where exactly AI benefits design teams. And all o... » read more

3D-ICs May Be The Least-Cost Option
By Brian Bailey - 30 Nov, 2023 - Comments: 1

When 2.5D and 3D packaging were first conceived, the general consensus was that only the largest semiconductor houses would be able to afford them, but development costs are quickly coming under control. In some cases, these advanced packages actually may turn out to be the lowest-cost options. With stacked die [1], each die is considered to be a complete functional block or sub-system. In t... » read more

Nascent Chiplet Tech Gaining Attention In Defense and Commercial Industries
By Ben Miller - 30 Nov, 2023 - Comments: 0

The economic benefits derived from Moore's Law have changed, and not for the better. This shift – especially on the manufacturing side of system-on-chip (SoC) devices, has both the defense and commercial customers in the semiconductor industry wondering what will come next. One way to extend Moore's Law's cost, feature, and size benefits is with multi-chip technology, now commonly known as... » read more

Considerations For Accelerating On-Device Stable Diffusion Models
By Pat Donnelly - 30 Nov, 2023 - Comments: 0

One of the more powerful – and visually stunning – advances in generative AI has been the development of Stable Diffusion models. These models are used for image generation, image denoising, inpainting (reconstructing missing regions in an image), outpainting (generating new pixels that seamlessly extend an image's existing bounds), and bit diffusion. Stable Diffusion uses a type of dif... » read more

Help, 3D-IC Is Stuck In A Country Song
By John Ferguson - 30 Nov, 2023 - Comments: 0

Every time I focus on three-dimensional (3D) integrated circuit (IC) design, I start hearing the Luke Bryan song “Rain Makes Corn, Corn Makes Whiskey.” Not because I need a strong drink to work with 3D-IC designs, but because there is a similar, although slightly more complicated, series of cause and effect issues that impact 3D-ICs. Pushing electrons through very thin metal wires and switc... » read more

A Path To Increase Cell Utilization Rate And Decrease Routing Congestion In Chip Design Floorplanning
By Jim Schultz - 30 Nov, 2023 - Comments: 0

What do chip floorplanning and city planning have in common? As it turns out, quite a lot. This was the premise for an award-winning talk given by MediaTek at this year’s Synopsys User Group (SNUG) in Taiwan. Urban city development was used as an example to understand how utilization rate (UR) and congestion relate to chip planning. UR was defined in the example as population density while... » read more

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