Blog Review: Aug. 31


Cadence's Paul McLellan wonders what's happened to 450mm wafers as equipment development efforts end, the only wafer fab is decommissioned, and manufacturers see little likelihood to recoup further investment in R&D. Synopsys' Manuel Mota finds that the scale and modular flexibility of chiplets can help meet narrowing time-to-market windows and looks at how UCIe provides a complete stack... » read more

Week In Review: Design, Low Power


Quantum computing Baidu introduced a 10-qubit quantum computer called Qianshi and what it described as “the world's first all-platform quantum hardware-software integration solution that provides access to various quantum chips via mobile app, PC, and cloud.” The company said it has also completed the design of a 36-qubit quantum chip. Scientists said “levitating” nanoparticles co... » read more

The Next Incarnation Of EDA


The EDA industry has incrementally addressed issues as they arise in the design of electronic systems, but is there about to be a disruption? Academia is certainly seeing that as a possibility, but not all of them see it happening for the same reason. The academic community questioned the future of EDA at the recent Design Automation Conference. Rather than EDA as we know it going away, they... » read more

Learning How To Forget


There has been a lot of talk recently about the right to be forgotten, or data privacy rights. These require companies that hold data about us to remove it when properly requested. This might be data that was collected as we browse the Internet, or from online shopping. Or perhaps it's collected as we drive our cars past cameras, or GPS tracking of our cellphones, or many other ways – some of... » read more

Chasing The Next Level Of Productivity


The keynotes at the recent Design Automation Conference (DAC) gave some great insights into the direction of semiconductor technology and chip and system design. For the first time in a long time, my family members and friends have gained awareness of the importance of semiconductors and electronic design automation. I think this means it is also time to look back on where productivity improvem... » read more

ECO Should Not Stand For Extended Challenge Order


There’s an old saying that the first 90% of a task takes 90% of the schedule, and the remaining 10% takes the other 90% of the time. In chip development, design-signoff closure has become one such task. Ideally, when the design has been placed and routed (physical implementation), final analysis of timing and other metrics is performed and an engineering change order (ECO) file is issued to t... » read more

How Climate Change Affects Data Centers


Data centers are hot, and they may get even hotter. As climate change impacts temperatures around the world, designers are changing the computing hubs that are tied to nearly every aspect of modern life to make them more efficient, more customized, and potentially more disaggregated. These shifts are taking on new urgency as the tech industry grapples with months of sweltering temperatures o... » read more

Radar For Automotive: How Far Can A Radar See?


In the previous entries of this blog dedicated to automotive radar, the reason for using radar and the principle of operation of the frequency modulated continuous wave radar were presented. Now, we will focus on the performance of the system, starting with its maximum detection range: how far can we detect an obstacle ahead? We need to have as much foresight as possible, to be able to detect a... » read more

Earlier SoC Design Exploration And Verification Gets Better Designs To Tapeout Faster


By Nermeen Hossam and John Ferguson Between the complexity of advanced node design verification and the competition to be first to the market, system-on-chip (SoC) designers no longer have the luxury of waiting until each sub-block of a chip is DRC-clean to start their chip assembly and verification. Today’s SoC designers typically start chip integration in parallel with block development.... » read more

Verification Scorecard: How Well Is The Industry Doing?


Semiconductor Engineering sat down to discuss how well verification tools and methodologies have been keeping up with demand, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu Ganguly, vice president of product marketing at Caden... » read more

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