category: Architectures

category: IoT, Security & Automotive

CORDIC-based Chip Design With Iterative Pipelining Architecture for Biped Robots
By Technical Paper Link - 03 Jun, 2022 - Comments: 0

New technical paper titled "Efficient and Accurate CORDIC Pipelined Architecture Chip Design Based on Binomial Approximation for Biped Robot," from researchers at Chung Yuan Christian University (Taiwan) and Ateneo de Manila University (Philippines). Abstract: "Recently, much research has focused on the design of biped robots with stable and smooth walking ability, identical to human bein... » read more

CFU Playground: Significant Speedups & Design Space Exploration Between CPU & Accelerator
By Technical Paper Link - 30 May, 2022 - Comments: 0

Technical paper titled "CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs," from Google, Purdue University and Harvard University. Abstract "We present CFU Playground, a full-stack open-source framework that enables rapid and iterative design of machine learning (ML) accelerators for embedded ML systems. Our toolchain tightly integr... » read more

Neuromorphic HW Fabric That Supports A Recently Proposed Class of Stochastic Neural Network
By Technical Paper Link - 25 May, 2022 - Comments: 0

New research paper titled "Neural sampling machine with stochastic synapse allows brain-like learning and inference" from University of Notre Dame and Department of Cognitive Sciences, University of California Irvine. Abstract "Many real-world mission-critical applications require continual online learning from noisy data and real-time decision making with a defined confidence level. Brain-... » read more

Performing Edge Detection With Oscillatory Neural Networks as a Hetero-associative Memory
By Technical Paper Link - 23 May, 2022 - Comments: 0

New research paper titled "Oscillatory Neural Network as Hetero-Associative Memory for Image Edge Detection" from LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier. Abstract "The increasing amount of data to be processed on edge devices, such as cameras, has motivated Artificial Intelligence (AI) integration at the edge. Typical image processing me... » read more

A Methodology for Automatic eFPGA redaction
By Technical Paper Link - 20 May, 2022 - Comments: 0

New academic paper titled "ALICE: An Automatic Design Flow for eFPGA Redaction" from researchers at Politecnico di Milano, New York University, University of Calgary, and the University of Utah. Abstract "Fabricating an integrated circuit is becoming unaffordable for many semiconductor design houses. Outsourcing the fabrication to a third-party foundry requires methods to protect the intell... » read more

Silicon Verified ASIC Implementation for Saber
By Technical Paper Link - 13 May, 2022 - Comments: 0

New research paper from Purdue University, KU Leuven, and Intel Labs titled "A 334uW 0.158mm2 Saber Learning with Rounding based Post-Quantum Crypto Accelerator." Abstract: "National Institute of Standard & Technology (NIST) is currently running a multi-year-long standardization procedure to select quantum-safe or post-quantum cryptographic schemes to be used in the future. Saber is the... » read more

SOT-MRAM-based CIM architecture for a CNN model
By Technical Paper Link - 09 May, 2022 - Comments: 0

New research paper "In-Memory Computing Architecture for a Convolutional Neural Network Based on Spin Orbit Torque MRAM", from National Taiwan University, Feng Chia University, Chung Yuan Christian University. Abstract "Recently, numerous studies have investigated computing in-memory (CIM) architectures for neural networks to overcome memory bottlenecks. Because of its low delay, high energ... » read more

Research Platform for Heterogeneous Computing (ETH Zurich)
By Technical Paper Link - 09 May, 2022 - Comments: 0

New academic paper from ETH Zurich, "HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing." Abstract: "Heterogeneous computers integrate general-purpose host processors with domain-specific accelerators to combine versatility with efficiency and high performance. To realize the full potential of heterogeneous computers, however, many hardware and software design ... » read more

Novel H2H mapping algorithm with both computation and communication awareness
By Technical Paper Link - 06 May, 2022 - Comments: 0

New research paper "H2H: Heterogeneous Model to Heterogeneous System Mapping with Computation and Communication Awareness" from University of Pittsburgh, Georgia Tech. Abstract: "The complex nature of real-world problems calls for heterogeneity in both machine learning (ML) models and hardware systems. The heterogeneity in ML models comes from multi-sensor perceiving and multi-task lear... » read more

Parallel Circuit Execution & NISQ Computing
By Technical Paper Link - 02 May, 2022 - Comments: 0

Research from LIRMM, University of Montpellier, CNRS. Abstract "Quantum computing is performed on Noisy Intermediate-Scale Quantum (NISQ) hardware in the short term. Only small circuits can be executed reliably on a quantum machine due to the unavoidable noisy quantum operations on NISQ devices, leading to the under-utilization of hardware resources. With the growing demand to access quan... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy