category: Design & Verification

category: IoT, Security & Automotive

Predicting Warpage in Different Types of IC Stacks At Early Stage Of Package Design
By Technical Paper Link - 15 Mar, 2024 - Comments: 0

A new technical paper titled "Warpage Study by Employing an Advanced Simulation Methodology for Assessing Chip Package Interaction Effects" was published by researchers at Siemens EDA, D2S, and Univ. Grenoble Alpes, CEA, Leti. Abstract: "A physics-based multi-scale simulation methodology that analyses die stress variations generated by package fabrication is employed for warpage study. The ... » read more

LLMs For EDA, HW Design and Security
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A new technical paper titled "Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge" was published by researchers at Kansas State University, University of Science and Technology of China, Michigan Technological University, Washington University in St. Louis and Silicon Assurance. Abstract "In the rapidly evolving semiconductor industry, where research, design... » read more

Suppressing Power Side-Channel Attacks: A HW/SW Design For Resource-Constrained IoT Devices
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A technical paper titled “Hardware/Software Cooperative Design Against Power Side-Channel Attacks on IoT Devices” was published by researchers at Tokyo Institute of Technology and the University of Electro-Communications. Abstract: "With the growth of Internet of Things (IoT) era, the protection of secret information on IoT devices is becoming increasingly important. For IoT devices, atta... » read more

Resistive Switching Analysis In Titanium Oxide-Based Memristors Including Surface Scanning Thermal Microscopy
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A technical paper titled “Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors” was published by researchers at Universidad de Granada, Leibniz-Institut für innovative Mikroelektronik, Universidad Politécnicade Madrid, University of Twente, King Abdullah University of Science and Technology (KAUST), and Universitat de Barcelona. Abstract: "Resist... » read more

An Analytical EM Model For IC Shielding Against HW Attacks
By Technical Paper Link - 05 Mar, 2024 - Comments: 0

A technical paper titled “Refined Analytical EM Model of IC-Internal Shielding for Hardware-Security and Intra-Device Simulative Framework” was published by researchers at Bar-Ilan University and Rafael Defense Systems. Abstract: "Over the past two decades, the prominence of physical attacks on electronic devices, designed to extract confidential information, has surged. These attacks exp... » read more

Lowering The Computational Cost of Simulation (DOE, Princeton)
By Technical Paper Link - 05 Mar, 2024 - Comments: 0

A technical paper titled “Accuracy of the explicit energy-conserving particle-in-cell method for under-resolved simulations of capacitively coupled plasma discharges” was published by researchers at Princeton University. Abstract: "The traditional explicit electrostatic momentum-conserving particle-in-cell algorithm requires strict resolution of the electron Debye length to deliver numeri... » read more

Impact of Scaling and BEOL Technology Solutions At The 7nm Node On MRAM
By Technical Paper Link - 20 Feb, 2024 - Comments: 0

A technical paper titled “Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories” was published by researchers at Georgia Institute of Technology. Abstract: "While magnetic random-access memories (MRAMs) are promising because of their nonvolatility, relatively fast speeds, and high endurance, there are major challenges in adopting the... » read more

FPGA-Based HW/SW Platform For Pre-Silicon Emulation Of RISC-V Designs (Barcelona Supercomputing Center)
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “Makinote: An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs” was published by researchers at Barcelona Supercomputing Center and Universitat Politècnica de Catalunya. Abstract: "Emulating chip functionality before silicon production is crucial, especially with the increasing prevalence of RISC-V-based designs. FPGAs are promising candidate... » read more

HW Security Bug Characteristics in Google’s OpenTitan Silicon Root Of Trust Project 
By Technical Paper Link - 15 Feb, 2024 - Comments: 0

A technical paper titled “An Investigation of Hardware Security Bug Characteristics in Open-Source Projects” was published by researchers at NYU Tandon School of Engineering and University of Calgary. Abstract: "Hardware security is an important concern of system security as vulnerabilities can arise from design errors introduced throughout the development lifecycle. Recent works have pro... » read more

Simulation Of A Kicked Ising Quantum System On The Heavy Hexagon Lattice
By Technical Paper Link - 14 Feb, 2024 - Comments: 0

A technical paper titled “Efficient Tensor Network Simulation of IBM’s Eagle Kicked Ising Experiment” was published by researchers at the Flatiron Institute and New York University. Abstract: "We report an accurate and efficient classical simulation of a kicked Ising quantum system on the heavy hexagon lattice. A simulation of this system was recently performed on a 127-qubit quantum pr... » read more

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