Diamond Semiconductor: Highest Breakdown Voltage, Lowest Leakage Current


A technical paper titled "Diamond p-Type Lateral Schottky Barrier Diodes With High Breakdown Voltage (4612 V at 0.01 mA/Mm)" was published by researchers at University of Illinois at Urbana–Champaign. Abstract "Diamond p-type lateral Schottky barrier diodes (SBDs) with a 2- μm -thick drift layer are fabricated with and without Al2O3 field plates. Schottky contacts composed of Mo (50 nm) ... » read more

Engineering chirality at wafer scale with ordered CNT architecture (Rice University and others)


A new technical paper titled "Engineering chirality at wafer scale with ordered carbon nanotube architectures" was published by researchers at Rice University, University of Utah, J.A. Woollam Co. and Tokyo Metropolitan University. Abstract "Creating artificial matter with controllable chirality in a simple and scalable manner brings new opportunities to diverse areas. Here we show two su... » read more

Lateral 3 kV AlN SBDs on Bulk AlN Substrates By MOCVD


A new technical paper titled "3 kV AlN Schottky Barrier Diodes on Bulk AlN Substrates by MOCVD" was published by researchers at Arizona State University. Abstract "This letter reports the first demonstration of AlN Schottky diodes on bulk AlN substrates by metalorganic chemical vapor phase deposition (MOCVD) with breakdown voltages exceeding 3 kV. The devices exhibited good rectifying char... » read more

New Polymer-Based Semiconductor: Harnessing The Power of Chirality


A technical paper titled “Subtle Molecular Changes Largely Modulate Chiral Helical Assemblies of Achiral Conjugated Polymers by Tuning Solution-State Aggregation” was published by researchers at University of Illinois Urbana-Champaign and Purdue University. Abstract: "Understanding the solution-state aggregate structure and the consequent hierarchical assembly of conjugated polymers is cr... » read more

Hybrid Photoresist Capable Of High-Resolution, Positive-Tone EUVL Patterning


A technical paper titled “Vapor-Phase Infiltrated Organic–Inorganic Positive-Tone Hybrid Photoresist for Extreme UV Lithography” was published by researchers at Stony Brook University, Brookhaven National Laboratory, and University of Texas at Dallas. Abstract: "Continuing extreme downscaling of semiconductor devices, essential for high performance and energy efficiency of future microe... » read more

Modulated Electron Microscopy Applied In The Process Monitoring Of Memory Cell And The Defect Inspection Of Floating Circuits


A technical paper titled “In situ electrical property quantification of memory devices by modulated electron microscopy” was published by researchers at Hitachi High-Tech Corporation, KIOXIA Corporation, and Western Digital. Abstract: "E-beam inspection based on voltage-contrast (VC) defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in e-beam... » read more

A Modelling Approach To Well-Known And Exotic 2D Materials For Next-Gen FETs


A technical paper titled “Field-Effect Transistors based on 2-D Materials: a Modeling Perspective” was published by researchers at ETH Zurich. Abstract: "Two-dimensional (2D) materials are particularly attractive to build the channel of next-generation field-effect transistors (FETs) with gate lengths below 10-15 nm. Because the 2D technology has not yet reached the same level of maturity... » read more

Analyzing The U.S. Advanced Packaging Ecosystem With Countermeasures To Mitigate HW Security Issues


A technical paper titled “US Microelectronics Packaging Ecosystem: Challenges and Opportunities” was published by researchers at University of Florida, University of Miami, and Skywater Technology Foundry. Abstract: "The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technologica... » read more

Progress In The Fabrication Of CMOS Devices Based On Stacked 2D TMD Nanoribbons (Intel)


A technical paper titled “Process integration and future outlook of 2D transistors” was published by researchers at Intel Corporation. Abstract: "The academic and industrial communities have proposed two-dimensional (2D) transition metal dichalcogenide (TMD) semiconductors as a future option to supplant silicon transistors at sub-10nm physical gate lengths. In this Comment, we share the r... » read more

Predicting Defect Properties In Semiconductors With Graph Neural Networks


A technical paper titled “Accelerating Defect Predictions in Semiconductors Using Graph Neural Networks” was published by researchers at Purdue University, Indian Institute of Technology (IIT) Madras, GE Research, and National Institute of Standards and Technology (NIST). Abstract: "Here, we develop a framework for the prediction and screening of native defects and functional impurities i... » read more

← Older posts Newer posts →