Gold Substrate Plays Boosts Performance of Tellurium-Based Memristors


A new technical paper titled "Non-Volatile Resistive Switching in Nanoscaled Elemental Tellurium by Vapor Transport Deposition on Gold" was published by researchers at Politecnico di Milano, UT Austin, and STMicroelectronics. Abstract: "Two-dimensional (2D) materials are promising for resistive switching in neuromorphic and in-memory computing, as their atomic thickness substantially impr... » read more

Ambipolar Schottky-based FeFET For Ultrascaled Memory Applications


A new technical paper titled "On the Potential of Ambipolar Schottky-Based Ferroelectric Transistor Designs for Enhanced Memory Windows in Scaled Devices" was published by researchers at Global TCAD Solutions, Igor Sikorsky Kyiv Polytechnic Institute, INSA Lyon, and NaMLab. "Here, we promote an ambipolar Schottky-based ferroelectric transistor (AS-FeFET) as an alternative design. We demonstr... » read more

Fine-Grained Functional Partitioning For Low Level SRAM Cache in 3D-IC designs (imec)


A new technical paper titled "Towards Fine-grained Partitioning of Low-level SRAM Caches for Emerging 3D-IC Designs" was published by researchers at imec. "We propose a partitioning of low-level (faster access) caches in 3D using an Array Under CMOS (AuC) technology paradigm. Our study focuses on partitioning and optimization of SRAM bit-cells and peripheral circuits, enabling heterogeneous ... » read more

Memristors: Flexible Behavioral Model ( Israel Institute of Technology)


A new technical paper titled "VVTEAM: A Compact Behavioral Model for Volatile Memristors" was published by researchers at Technion – Israel Institute of Technology. Abstract "Volatile memristors have recently gained popularity as promising devices for neuromorphic circuits, capable of mimicking the leaky function of neurons and offering advantages over capacitor-based circuits in terms of... » read more

Mixed Signal In-Memory Computing With Massively Parallel Gradient Calculations of High-Degree Polynomials


A new technical paper titled "Computing high-degree polynomial gradients in memory" was published by researchers at UCSB, HP Labs, Forschungszentrum Juelich GmbH, and RWTH Aachen University. Abstract "Specialized function gradient computing hardware could greatly improve the performance of state-of-the-art optimization algorithms. Prior work on such hardware, performed in the context of Isi... » read more

Better Security and Power Efficiency of Ascon HW Implementation with STT-MRAM (CEA, et al.)


A new technical paper titled "Enhancing Security and Power Efficiency of Ascon Hardware Implementation with STT-MRAM" was published by researchers at CEA, Leti, Université Grenoble Alpes, CNRS, and Spintec. Abstract "With the outstanding growth of Internet of Things (IoT) devices, security and power efficiency of integrated circuits can no longer be overlooked. Current approved standards f... » read more

Energy-Efficient DRAM↔PIM Transfers for PIM Systems (KAIST)


A new technical paper titled "PIM-MMU: A Memory Management Unit for Accelerating Data Transfers in Commercial PIM Systems" was published by researchers at KAIST. Abstract "Processing-in-memory (PIM) has emerged as a promising solution for accelerating memory-intensive workloads as they provide high memory bandwidth to the processing units. This approach has drawn attention not only from the... » read more

Memory Fundamentals For Engineers


Memory is one of a very few elite electronic components essential to any electronic system. Modern electronics perform extraordinarily complex duties that would be impossible without memory. Your computer obviously contains memory, but so does your car, your smartphone, your doorbell camera, your entertainment system, and any other gadget benefiting from digital electronics. This eBook prov... » read more

Quantum Computing: Google’s Surface Code Technique to Reduce Errors


A new technical paper titled "Quantum error correction below the surface code threshold" was published by researchers at Google and other collaborators. Abstract "Quantum error correction provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, where the logical error rate is suppressed exponentially as more qubits are added. However, ... » read more

Analog In-Memory Computing: Fast Deep NN Training (IBM Research)


A new technical paper titled "Fast and robust analog in-memory deep neural network training" was published by researchers at IBM Research. Abstract "Analog in-memory computing is a promising future technology for efficiently accelerating deep learning networks. While using in-memory computing to accelerate the inference phase has been studied extensively, accelerating the training phase has... » read more

← Older posts Newer posts →