category: Power & Performance

category: IoT, Security & Automotive

SystemC-based Power Side-Channel Attacks Against AI Accelerators (Univ. of Lubeck)
By Technical Paper Link - 21 Dec, 2023 - Comments: 0

A new technical paper titled "SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not?" was published by researchers at Germany's University of Lubeck. Abstract "As training artificial intelligence (AI) models is a lengthy and hence costly process, leakage of such a model's internal parameters is highly undesirable. In the case of AI accelerators, side-chann... » read more

Mixed SRAM And eDRAM Cell For Area And Energy-Efficient On-Chip AI Memory (Yale Univ.)
By Technical Paper Link - 21 Dec, 2023 - Comments: 0

A new technical paper titled "MCAIMem: a Mixed SRAM and eDRAM Cell for Area and Energy-efficient on-chip AI Memory" was published by researchers at Yale University. Abstract: "AI chips commonly employ SRAM memory as buffers for their reliability and speed, which contribute to high performance. However, SRAM is expensive and demands significant area and energy consumption. Previous studies... » read more

Analog Planar Memristor Device: Developing, Designing, and Manufacturing
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Analog monolayer SWCNTs-based memristive 2D structure for energy-efficient deep learning in spiking neural networks" was published by researchers at Delft University of Technology and Khalifa University. Abstract: "Advances in materials science and memory devices work in tandem for the evolution of Artificial Intelligence systems. Energy-efficient computation... » read more

Forward Body Biasing in Bulk Cryo-CMOS With Negligible Leakage (TU Delft)
By Technical Paper Link - 20 Dec, 2023 - Comments: 0

A new technical paper titled "Cryogenic-Aware Forward Body Biasing in Bulk CMOS" was published by researchers at QuTech, Tu Delft. Abstract "Cryogenic CMOS (cryo-CMOS) circuits are often hindered by the cryogenic threshold-voltage increase. To mitigate such an increase, a forward body biasing (FBB) technique in bulk CMOS is proposed, which can operate up to the nominal supply without prob... » read more

Hardware-Based Methodology To Protect AI Accelerators
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “A Unified Hardware-based Threat Detector for AI Accelerators” was published by researchers at Nanyang Technological University and Tsinghua University. Abstract: "The proliferation of AI technology gives rise to a variety of security threats, which significantly compromise the confidentiality and integrity of AI models and applications. Existing software-based so... » read more

A Survey Of Recent Advances In Spiking Neural Networks From Algorithms To HW Acceleration
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Recent Advances in Scalable Energy-Efficient and Trustworthy Spiking Neural networks: from Algorithms to Technology” was published by researchers at Intel Labs, University of California Santa Cruz, University of Wisconsin-Madison, and University of Southern California. Abstract: "Neuromorphic computing and, in particular, spiking neural networks (SNNs) have becom... » read more

Dual Instruction-Set Architecture, Supporting A TTA And RISC-V Instruction Set Via a Lightweight Microcode Hardware Unit
By Technical Paper Link - 13 Dec, 2023 - Comments: 0

A technical paper titled “Energy-Efficient Exposed Datapath Architecture With a RISC-V Instruction Set Mode” was published by researchers at Tampere University. Abstract: "Transport triggered architectures (TTAs) follow the static programming model of very long instruction word (VLIW) processors but expose additional information of the processor datapath in the programming interface, whic... » read more

Designing Low Power Radar Processors
By Technical Paper Link - 12 Dec, 2023 - Comments: 0

A technical paper titled “Ellora: Exploring Low-Power OFDM-based Radar Processors using Approximate Computing” was published by researchers at University of California Irvine, University of Wisconsin-Madison, and TCS Research. Abstract: "In recent times, orthogonal frequency-division multiplexing (OFDM)-based radar has gained wide acceptance given its applicability in joint radar-communic... » read more

Enabling Scalable Accelerator Design On Distributed HBM-FPGAs (UCLA)
By Technical Paper Link - 06 Dec, 2023 - Comments: 0

A technical paper titled “TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs” was published by researchers at University of California Los Angeles. Abstract: "Despite the increasing adoption of Field-Programmable Gate Arrays (FPGAs) in compute clouds, there remains a significant gap in programming tools and abstractions which can leverage network-connected, cloud-scale... » read more

Alleviating the DRAM Capacity Bottleneck in Consumer Devices with NVMs
By Technical Paper Link - 30 Nov, 2023 - Comments: 0

A new technical paper titled "Extending Memory Capacity in Modern Consumer Systems With Emerging Non-Volatile Memory: Experimental Analysis and Characterization Using the Intel Optane SSD" was published by researchers at ETH Zurich, University of Illinois Urbana-Champaign, Google, and Rivos. Abstract Excerpt "DRAM scalability is becoming a limiting factor to the available memory capacity in... » read more

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