category: Power & Performance

category: IoT, Security & Automotive

Multi-Rate Discrete-Time Modeling Approach Of A Power Hardware-in-the-Loop Setup (Karlsruhe Institute of Technology)
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “Multi-rate Discrete Domain Modeling of Power Hardware-in-the-Loop Setups” was published by researchers at the Institute for Technical Physics, Karlsruhe Institute of Technology, Karlsruhe, Germany. Abstract: "Power Hardware-in-the-Loop (PHIL) facilitates the testing of novel power engineering solutions in the lab, allowing a flexible testing environment while kee... » read more

Impact of Semiconductor Optical Amplifers On Performance & Power Consumption in Data Centers (UCSB)
By Technical Paper Link - 22 May, 2023 - Comments: 0

A new technical paper titled "Integrated SOAs enable energy-efficient intra-data center coherent links" was published by researchers at UC Santa Barbara. "In this work, we analyze the impact of integrated semiconductor optical amplifiers (SOAs) on link performance and power consumption, and describe the optimal design spaces for low-cost and energy-efficient coherent links. Placing SOAs afte... » read more

Memory Disaggregation Research And Making It Practical With Hardware Trends (U. of Michigan)
By Technical Paper Link - 22 May, 2023 - Comments: 0

A new technical paper titled "Memory Disaggregation: Advances and Open Challenges" was published by researchers at University of Michigan. Abstract "Compute and memory are tightly coupled within each server in traditional datacenters. Large-scale datacenter operators have identified this coupling as a root cause behind fleet-wide resource underutilization and increasing Total Cost of Owners... » read more

Optimizing Projected PCM for Analog Computing-In-Memory Inferencing (IBM)
By Technical Paper Link - 22 May, 2023 - Comments: 0

A new technical paper titled "Optimization of Projected Phase Change Memory for Analog In-Memory Computing Inference" was published by researchers at IBM Research. "A systematic study of the electrical properties-including resistance values, memory window, resistance drift, read noise, and their impact on the accuracy of large neural networks of various types and with tens of millions of wei... » read more

Solving Memory Mapping Issues with Deep RL (Google)
By Technical Paper Link - 21 May, 2023 - Comments: 0

A technical paper titled "Optimizing Memory Mapping Using Deep Reinforcement Learning" was published by Google DeepMind and Google. Abstract: "Resource scheduling and allocation is a critical component of many high impact systems ranging from congestion control to cloud computing. Finding more optimal solutions to these problems often has significant impact on resource and time savings, red... » read more

Non-Traditional Design of Dynamic Logic Gates and Circuits with FDSOI FETs
By Technical Paper Link - 19 May, 2023 - Comments: 1

A new technical paper titled "Non-Traditional Design of Dynamic Logics using FDSOI for Ultra-Efficient Computing" was published by researchers at University of Stuttgart, UC Berkeley, Indian Institute of Technology Kanpur, and TU Munich, with funding by the German Research Foundation. Abstract "In this paper, we propose a non-traditional design of dynamic logic circuits using Fully-Deplet... » read more

Edge HW-SW Co-Design Platform Integrating RISC-V And HW Accelerators
By Technical Paper Link - 16 May, 2023 - Comments: 0

A new technical paper titled "EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators" was published by researchers at Columbia University. "We introduce a hardware/software co-design approach that combines software applications designed with Eigen, a powerful open-source C++ library that abstracts linear-algebra workloads, and real-time execution on heterog... » read more

Server Design With Pin-Efficient CXL Interface (Georgia Tech)
By Technical Paper Link - 10 May, 2023 - Comments: 0

A new technical paper titled "A Case for CXL-Centric Server Processors" was written by researchers at Georgia Tech. Abstract: "The memory system is a major performance determinant for server processors. Ever-growing core counts and datasets demand higher bandwidth and capacity as well as lower latency from the memory system. To keep up with growing demands, DDR--the dominant processor inter... » read more

Quantum: Loophole-​Free Bell Test with Superconducting Circuits (ETH Zurich)
By Technical Paper Link - 10 May, 2023 - Comments: 0

A new technical paper titled "Loophole-free Bell inequality violation with superconducting circuits" was published by a group of researchers led by ETH Zurich. Abstract (partial) "Here we demonstrate a loophole-free violation of Bell’s inequality with superconducting circuits, which are a prime contender for realizing quantum computing technology. To evaluate a Clauser–Horne–Shimony... » read more

Performance Of Analog In-Memory Computing On Imaging Problems
By Technical Paper Link - 09 May, 2023 - Comments: 0

A technical paper titled "Accelerating AI Using Next-Generation Hardware: Possibilities and Challenges With Analog In-Memory Computing" was published by researchers at Lund University and Ericsson Research. Abstract "Future generations of computing systems need to continue increasing processing speed and energy efficiency in order to meet the growing workload requirements under stringent en... » read more

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