FICS Research Institute: Detailed Assessment of the PQC Candidates To Power Side Channel Attacks


New research paper by a team of researchers from FICS Research Institute titled "PQC-SEP: Power Side-Channel Evaluation Platform for Post-Quantum Cryptography Algorithms." Abstract "Research in post-quantum cryptography (PQC) aims to develop cryptographic algorithms that can withstand classical and quantum attacks. The recent advance in the PQC field has gradually switched from the theory t... » read more

Spatial Analysis Tools & Side Channel Attacks


Abstract "Practical side-channel attacks on recent devices may be challenging due to the poor quality of acquired signals. It can originate from different factors, such as the growing architecture complexity, especially in System-on-Chips, creating unpredictable and concurrent operation of multiple signal sources in the device. This work makes use of mixture distributions to formalize... » read more

SCV (select, cross, and variation): Data Encryption


A new technical paper "RSCV: Reversible Select, cross and variation architecture in quantum-dot cellular automata." Abstract "In the past few years, CMOS semiconductor has been a growing and evolving technology in VLSI. However, due to the scaling issue and some other constraints like heat generation, high power consumption QCA (quantum cellular automata) emerged as an alternate and enhan... » read more

Hardware Encryption: Ultra-compact Active Interconnect Based on FeFET


New technical paper "Hardware functional obfuscation with ferroelectric active interconnects" from researchers at Penn State, Rochester Institute of Technology, GlobalFoundries Fab1, North Dakota State University. Abstract "Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we... » read more

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks


New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

Real-time instruction-level verification of remote IoT/CPS devices via side channels


Abstract "In recent years, with the rise of IoT technology, wireless Cyber-Physical Systems (CPS) have become widely deployed in critical infrastructure, including power generation, military systems, and autonomous and unmanned vehicles. The introduction of network connectivity for data transfer, cloud support, etc., into CPS, can lead to malware injection. Meanwhile, outsourcing of advanced t... » read more

Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection


Abstract "Globalization in the semiconductor industry enables fabless design houses to reduce their costs, save time, and make use of newer technologies. However, the offshoring of Integrated Circuit (IC) fabrication has negative sides, including threats such as Hardware Trojans (HTs) - a type of malicious logic that is not trivial to detect. One aspect of IC design that is not affected by g... » read more

Performance Implications for Multi-Core RISC-V Systems with Dedicated Security Hardware


Abstract "The RISC-V instruction set architecture (ISA) is a promising open-source architecture supporting the Open Era of Computing. As RISC-V matures, consumers, industry leaders, and nation states are looking at the potential benefits RISC-V offers –especially for secure systems which may require privileged architecture implementations, physical memory protection (PMP), or trusted executi... » read more

Hardware Countermeasures Benchmarking against Fault Attacks


Abstract "The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use protection mechanisms that guarantee the expected level of security. The AES cipher, as a standard, has been the target of numerous DFA techniques, where its security has been compromised through different formulations and types of... » read more

Quantum Machine Learning: Security Threats & Lines Of Defense


New research paper from Pennsylvania State University explores quantum machine learning (QML) and its use in hardware security. Find the technical paper here. April 2022. Satwik Kundu and Swaroop Ghosh. 2022. Security Aspects of Quantum Machine Learning: Opportunities, Threats and Defenses (Invited). In Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI ’22), June 6–8,... » read more

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