Transformation Of 2D-ICs Into 3D-ICs Using Shuttle Chips From Multi-Project Wafers (Tohoku University)


A new technical paper titled "Die-Level Transformation of 2D Shuttle Chips into 3D-IC for Advanced Rapid Prototyping using Meta Bonding" was published by researchers at Tohoku University. Abstract "Three-dimensional integrated circuit (3D-IC) technology, often referred to as through-silicon via (TSV) formation technology, has been steadily maturing and is increasingly used in advanced semic... » read more

Novel Thin Film Growth Technique Of A WBG Sulfide Semiconductor in BEOL Compatible Conditions (USC, LBNL, TSMC)


A new technical paper titled "Textured growth and electrical characterization of Zinc Sulfide on back-end-of-the-line (BEOL) compatible substrates" was published by researchers at USC, Lawrence Berkeley National Laboratory and TSMC. Abstract "Scaling of transistors has enabled continuous improvements in logic device performance, especially through materials engineering. However, surpassing ... » read more

CFETs: Reliability of Complementary Field-Effect Transistors (TU Munich, IIT)


A technical paper titled "CFET Beyond 3 nm: SRAM Reliability under Design-Time and Run-Time Variability" was published by researchers at TU Munich and IIT Kanpur. Abstract "This work investigates the reliability of complementary field-effect transistors (CFETs) by addressing both design-time variability arising from process variations and run-time variability due to temperature and aging ef... » read more

Main Applications And Corresponding Requirements For IMC With RRAM Devices


A new technical paper titled "Resistive Switching Random-Access Memory (RRAM): Applications and Requirements for Memory and Computing" was published by researchers at Politecnico di Milano, IUNET and Hewlett-Packard Labs. Abstract "In the information age, novel hardware solutions are urgently needed to efficiently store and process increasing amounts of data. In this scenario, memory device... » read more

Investigation Of Self-Heating Effects on Fe-FinFETs On IMC Applications (TU Munich, IIT, U. Stuttgart)


A new technical paper titled "Investigating Self-Heating Effects in Ferroelectric FinFETs for Reliable In-Memory Computing" was published by researchers at TU Munich, University of Stuttgart and Indian Institute of Technology, Kanpur. Abstract "Ferroelectric (Fe) FET has emerged as a promising candidate for efficient in-memory computing due to its properties, such as non-volatility and lo... » read more

Impact Of Cryogenic Temps On The Minimum-Operating Voltage Of 5nm FinFETs-Based SRAM (IIT, UC Berkeley et al)


A new technical paper titled "An Investigation of Minimum Supply Voltage of 5nm SRAM from 300K down to 10K" was published by researchers at Indian Institute of Technology, UC Berkeley and Munich Institute of Robotics and Machine Intelligence. Abstract "In this article, we present a comprehensive study of the impact of cryogenic temperatures on the minimum-operating voltage (Vmin) of 5 nm ... » read more

Single Transistor Memory Cell C2RAM Based On FDSOI For Quantum And Neuromorphic


A new technical paper titled "An Energy Efficient Memory Cell for Quantum and Neuromorphic Computing at Low Temperatures" was published by researchers at Forschungszentrum Jülich, RWTH Aachen University and SOITEC. Abstract: "Efficient computing in cryogenic environments, including classical von Neumann, quantum, and neuromorphic systems, is poised to transform big data processing. The que... » read more

2D Materials Roadmap: Current And Future Challenges, Solutions


A new technical paper titled "The 2D Materials Roadmap" was published by researchers at many institutions including Chinese Academy of Sciences, TU Denmark, Pennsylvania State University, University of Manchester, University of Cambridge et al. Abstract "Over the past two decades, 2D materials have rapidly evolved into a diverse and expanding family of material platforms. Many members of th... » read more

Scalable And Energy Efficient Solution for Hardware-Based ANNs (KAUST, NUS)


A new technical paper titled "Synaptic and neural behaviours in a standard silicon transistor" was published by researchers at KAUST and National University of Singapore. Abstract "Hardware implementations of artificial neural networks (ANNs)—the most advanced of which are made of millions of electronic neurons interconnected by hundreds of millions of electronic synapses—have achieved ... » read more

3D Photonic Integration For Ultra-Low-Energy, High-Bandwidth Interchip Data Links (Columbia et al.)


A new technical paper titled "Three-dimensional photonic integration for ultra-low-energy, high-bandwidth interchip data links" was published by researchers at Columbia University, Cornell University, Air Force Research Laboratory Information Directorate and Dartmouth College. Abstract "Artificial intelligence (AI) hardware is positioned to unlock revolutionary computational abilities by ... » read more

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