3D Power Delivery


Getting power into and around a chip is becoming a lot more difficult due to increasing power density, but 2.5D and 3D integration are pushing those problems to whole new levels. The problems may even be worse with new packaging approaches, such as chiplets, because they constrain how problems can be analyzed and solved. Add to that list issues around new fabrication technologies and an emph... » read more

Trading Off Power And Performance Earlier In Designs


Optimizing performance, power and reliability in consumer electronics is an engineering feat that involves a series of tradeoffs based on gathering as much data about the use cases in which a design will operate. Approaches vary widely by market, by domain expertise, and by the established methodologies and perspective of the design teams. As a result, one team may opt for a leading-edge des... » read more

Reducing Software Power


With the slowdown of Moore's Law, every decision made in the past must be re-examined to get more performance or lower power for a given function. So far, software has remained relatively unaffected, but it could be an untapped area for optimization and enable significant power reduction. The general consensus is that new applications such as artificial intelligence and machine learning, whe... » read more

Taking Energy Into Account


Considering power throughout the SoC design flow is common practice. The same cannot be said for energy, although that is beginning to change as chips increasingly incorporate heterogeneous processing elements. Combined with this, AI/ML/DL technologies increasingly allow engineering teams to explore and optimize design data for more targeted and efficient systems. But this approach also requ... » read more

Power Modeling Standard Released


Power is becoming a more important aspect of semiconductor design, but without an industry standard for power models, adoption is likely to be slow and fragmented. That is why Si2 and the IEEE decided to do something about it. Back in 2014, the IEEE expanded its interest in power standards with the creation of two new groups IEEE P2415 - Standard for Unified Hardware Abstraction and Layer fo... » read more

U.S. Consortium Pulls Ecosystem Into Quantum


Quantum computing promises to solve impossibly complex problems that no classical computer could solve, and do it in a humanly reasonable amount of time. The hitch is that quantum computers are still in the early development phase. Whether these computers can fulfill that promise is not yet known. Despite the uncertainty, no one wants to be left behind. That includes governments, which are w... » read more

Optimizing Power For Learning At The Edge


Learning on the edge is seen as one of the Holy Grails of machine learning, but today even the cloud is struggling to get computation done using reasonable amounts of power. Power is the great enabler—or limiter—of the technology, and the industry is beginning to respond. "Power is like an inverse pyramid problem," says Johannes Stahl, senior director of product marketing at Synopsys. "T... » read more

Determining Where Power Analysis Matters Most


How much accuracy is required in every stage of power analysis is becoming a subject of debate, as engineering teams wrestle with a mix of new architectures, different use cases and increasing pressure to get designs out on time. The question isn't whether power is a critical factor in designs anymore. That is a given. It is now about the most efficient way to tackle those issues, as well as... » read more

HBM2E: The E Stands for Evolutionary


Samsung introduced the first memory products in March that conform to JEDEC’s HBM2E specification, but so far nothing has come to market—a reflection of just how difficult it is to manufacture this memory in volume. Samsung’s new HBM2E (sold under the Flashbolt brand name, versus the older Aquabolt and Flarebolt brands), offers 33% better performance over HBM2 thanks to doubling the de... » read more

DRAM Tradeoffs: Speed Vs. Energy


Semiconductor Engineering sat down to talk about new DRAM options and considerations with Frank Ferro, senior director of product management at Rambus; Marc Greenberg, group director for product marketing at Cadence; Graham Allan, senior product marketing manager for DDR PHYs at Synopsys; and Tien Shiah, senior manager for memory marketing at Samsung Electronics. What follows are excerpts of th... » read more

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