category: Top Stories

category: IoT, Security & Automotive

Multicore Debug Evolves To The System-Level
By Ann Mutschler - 22 Dec, 2020 - Comments: 0

The proliferation and expansion of multicore architectures is making debug much more difficult and time-consuming, which in turn is increasing demand for more comprehensive system-level tools and approaches. Multicore/multiprocessor designs are the most complex devices to debug. More interactions and interdependencies between cores mean more things possibly can go wrong. In fact, so many pro... » read more

Variation Threat In Advanced Nodes, Packages Grows
By Ed Sperling - 21 Dec, 2020 - Comments: 0

Variation is becoming a much bigger and more complex problem for chipmakers as they push to the next process nodes or into increasingly dense advanced packages, raising concerns about the functionality and reliability of individual devices, and even entire systems. In the past, almost all concerns about variation focused on the manufacturing process. What printed on a piece of silicon didn't... » read more

3D NAND’s Vertical Scaling Race
By Mark LaPedus - 17 Dec, 2020 - Comments: 1

3D NAND suppliers are accelerating their efforts to move to the next technology nodes in a race against growing competition, but all of these vendors are facing an assortment of new business, manufacturing, and cost challenges. Two suppliers, Micron and SK Hynix, recently leapfrogged the competition and have taken the scaling race lead in 3D NAND. But Samsung and the Kioxia-Western Digital (... » read more

200mm Demand Surges
By Mark LaPedus - 17 Dec, 2020 - Comments: 1

A surge in demand for various chips is causing shortages for select 200mm foundry capacity as well as 200mm fab equipment, and it shows no signs of abating in 2021. Foundry customers will face a shortfall of 200mm capacity at select foundries at least in the first half of 2021, and perhaps beyond. Those customers will need to plan ahead to ensure they obtain enough 200mm capacity in 2021. Ot... » read more

The Darker Side Of Hybrid Bonding
By Katherine Derbyshire - 17 Dec, 2020 - Comments: 2

With semiconductors, it's often things everyone takes for granted that cause the biggest headaches, and that problem is compounded when something fundamental changes — such as bonding two chips together using a process aimed at maximizing performance. Case in point: CMP for backend of the line metallization in hybrid bonding. While this is a mature process, it doesn't easily translate for ... » read more

AI And High-NA EUV At 3/2/1nm
By Mark LaPedus - 16 Dec, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask issues with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Harry Levinson, principal at HJL Lithography; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. To vie... » read more

Power Models For Machine Learning
By Brian Bailey - 14 Dec, 2020 - Comments: 1

AI and machine learning are being designed into just about everything, but the chip industry lacks sufficient tools to gauge how much power and energy an algorithm is using when it runs on a particular hardware platform. The missing information is a serious limiter for energy-sensitive devices. As the old maxim goes, you can't optimize what you can't measure. Today, the focus is on functiona... » read more

Re-Architecting SerDes
By Brian Bailey - 10 Dec, 2020 - Comments: 0

Serializer/Deserializer (SerDes) circuits have been helping semiconductors move data around for years, but new process technologies are forcing it to adapt and change in unexpected ways. Traditionally implemented as an analog circuit, SerDes technology has been difficult to scale, while low voltages, variation, and noise are making it more difficult to yield sufficiently. So to remain releva... » read more

Low Power Still Leads, But Energy Emerges As Future Focus
By Ann Mutschler - 10 Dec, 2020 - Comments: 1

In 2021 and beyond, chips used in smartphones, digital appliances, and nearly all major applications will need to go on a diet. As the amount of data being generated continues to swell, more processors are being added everywhere to sift through that data to determine what's useful, what isn't, and how to distribute it. All of that uses power, and not all of it is being done as efficiently as... » read more

Waking And Sleeping Create Current Transients
By Bryon Moyer - 10 Dec, 2020 - Comments: 0

Silicon power-saving techniques are helping to reduce the power required by data centers and other high-intensity computing environments, but they’ve also added a significant challenge for design teams. As islands on high-powered chips go to sleep and wake up, the current requirements change quickly. This happens in a few microseconds, at most. The rapid change of loading creates a challen... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy