category: Top Stories

category: IoT, Security & Automotive

Big Data, Big Holes
By Ernest Worthman - 06 Jul, 2015 - Comments: 0

Having the potential to collect massive amounts of data from a variety of sources is the latest tool for trend spotting, predictive modeling, and forecasting of information. Information is power and big data promises to provide substantial, significant data that can be used by all tiers of businesses in the development of any number of new industrial and commercial strategies. For retailers ... » read more

Mobile Security And The IoE
By Ernest Worthman - 06 Jul, 2015 - Comments: 0

As we climb that mobility ladder to becoming a mostly mobile society, every rung seems to expose us to more and more layers of security failings. Six billion of the seven billion people on this planet rely on a variety of mobile devices to shop, bank, interface with social media, monitor their health, and monitor their environment. Unless you are on the inside track and know better, one would t... » read more

Executive Insight: Wally Rhines
By Ed Sperling - 01 Jul, 2015 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, sat down with Semiconductor Engineering to talk about what's changing across a wide swath of the industry, where the new opportunities will be, when security will become a real opportunity for EDA, and why Moore's Law will die but progress will continue forever. SE: Looking back over the past year, what's changed and where are the possible r... » read more

The Future Of Moore’s Law
By Ed Sperling - 29 Jun, 2015 - Comments: 1

Semiconductor Engineering sat down to discuss the future of Moore's Law with Jan Rabaey, Donald O. Pederson distinguished professor at [getentity id="22165" comment="UC Berkeley"]; Lucio Lanza, managing director of Lanza techVentures; Subramani Kengeri, vice president of advanced technology architecture at [getentity id="22819" comment="GlobalFoundries"]; Charlie Cheng, CEO of [getentity id="2... » read more

More Data, Different Approaches
By Ed Sperling - 25 Jun, 2015 - Comments: 0

Scaling, rising complexity, and integration are all contributing to an explosion in data, from initial design to physical layout to verification and into the manufacturing phase. Now the question is what to do with all of that data. For SoC designs, that data is critical for identifying real and potential problems. It also allows verification engineers working the back end of the design flow... » read more

EDA’s Clouded Future
By Brian Bailey - 25 Jun, 2015 - Comments: 0

There was a time, not that long ago, when chip design and EDA tools consumed some of the largest data centers with tens of thousands of machines and single datasets that consumed more than a hard disk could hold. The existing IT capabilities of the times were stretched to their limits. But while design sizes grew, other aspects of the flow did not develop as fast. “This has been driven by ... » read more

What Is A System Now?
By Ann Mutschler - 25 Jun, 2015 - Comments: 0

Defining a system used to be relatively straightforward. But as systems move onto chips, and as those chips increasingly are connected with applications and security spanning multiple devices, the definition is changing. This increases the complexity of the design process itself, and it raises questions about how chips and software will be designed and defined in the age of the [getkc id="76... » read more

Wrong Verification Revolution Offered
By Brian Bailey - 25 Jun, 2015 - Comments: 0

SoC design traditionally has been an ad-hoc process, with implementation occurring at the register transfer level. This is where verification starts, and after the blocks have been verified, it becomes an iterative process of integration and verification that continues until the complete system has been assembled. But today, this methodology has at least two major problems, which were addres... » read more

Asynchronous’ Impact On Tools
By Ann Mutschler - 25 Jun, 2015 - Comments: 0

In the right situation, using asynchronous logic makes a lot of sense—especially for security and IoT. But moving into the asynchronous design involves making tradeoffs, figuring out how the technical requirements of an application will impact the design, and understanding the limits of EDA tools in this area. “It's going to be halfway between digital and analog support,” said Bernard ... » read more

IP Integration Challenges Increase
By Ed Sperling - 24 Jun, 2015 - Comments: 0

Semiconductor Engineering sat down with Chris Rowen, CTO of [getentity id="22032" e_name="Cadence"]'s IP group; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; Patrick Soheili, vice president of product management and corporate development at [getentity id="22242" e_name="eSilicon"]; Navraj Nandra, senior director of marketing for DesignWare analog and mixed-signal IP at [getentity ... » read more

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