Improving Transistor Reliability


One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Inside Process Technology


Semiconductor Engineering sat down to discuss the foundry business, memory, process technology, lithography and other topics with David Fried, chief technology officer at [getentity id="22210" e_name="Coventor"], a supplier of predictive modeling tools. What follows are excerpts of that conversation. SE: Chipmakers are ramping up 16nm/14nm finFETs today, with 10nm and 7nm finFETs just around... » read more

Rightsizing Challenges Grow


Rightsizing chip architectures is getting much more complicated. There are more options to choose from, more potential bottlenecks, and many more choices about what process to use at what process node and for which markets and price points. Rightsizing is a way of targeting chips to specific application needs, supplying sufficient performance while minimizing power and cost. It has been a to... » read more

Convolutional Neural Networks Power Ahead


While the term may not be immediately recognizable, convolutional neural networks (CNNs) are already part of our daily lives—and they are expected to become even more significant in the near future. [getkc id="261" kc_name="Convolutional neural networks"] are a form of machine learning modeled on the way the brain's visual cortex distinguishes one object from another. That helps explain wh... » read more

Power Management Heats Up


Power management has been talked about a lot recently, especially when it comes to mobile devices. But power is only a part of the issue—and perhaps not even the most important part. Heat is the ultimate limiter. If you cannot comfortably place the device on your face or wrist, then you will not have a successful product. Controlling heat, at the micro and macro levels, is an important asp... » read more

2.5D Becomes A Reality


Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Analyzing The Integrity Of Power


Power analysis is shifting much earlier in the chip design process, with power emerging as the top design constraint at advanced process nodes. As engineering teams pack more functionality and content into bigger and more complex chips, they are having to deal with more complex interactions that affect everything from power to its impact on signal integrity and long-term reliability. That, i... » read more

Bridging The IP Divide


The adoption of an IP-based model has enabled designs to keep filling the available chip area while allowing design time to shrink. But there is a divide between IP providers and IP users. It is an implicit fuzzy contract about how the IP should be used, what capabilities it provides, and the extent of the verification that has been performed. IP vendors have been trying to formalize this as mu... » read more

Unexpected Security Holes


Security is emerging as one of the top challenges in semiconductor design across a variety of markets, with the number of security holes growing by orders of magnitude in sectors that have never dealt with these kinds of design constraints before. While security has been a topic of conversation for years in mobile phones and data centers, commercial and industrial equipment is being connecte... » read more

Where Is Next-Gen Lithography?


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at Imec; Harry Levinson, senior fellow and senior director of technology research at GlobalFoundries; Uday Mitra, vice president and head of strategy and marketing for the Etch Business Unit and Patterning Module at Applied Materials; Naoya Haya... » read more

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