category: Top Stories

category: Auto, Security & Edge AI

ESL Flow is Dead
By Brian Bailey - 28 Apr, 2016 - Comments: 3

It was 20 years ago that Gary Smith coined the term [getkc id="48" comment="Electronic System Level"] (ESL). He foresaw the next logical migration in abstraction up from the [getkc id="49" comment="Register Transfer Level"] (RTL) to something that would be capable of describing and building complex electronic systems. He also saw that the future of EDA depended upon who would control that marke... » read more

Way Too Much Data
By Ed Sperling - 28 Apr, 2016 - Comments: 0

Moving to the next process nodes will produce volumes more data, forcing chipmakers to adopt more expensive hardware to process and utilize that data, more end-to-end methodologies, as well as using tools and approaches that in the past were frequently considered optional. Moreover, where that data needs to be dealt with is changing as companies adopt a "shift left" approach to developing so... » read more

Bridging Hardware And Software
By Ann Mutschler - 28 Apr, 2016 - Comments: 1

The barriers between hardware and software design and verification are breaking down with more intricately integrated systems, bringing together different disciplines and tools. But there are lingering questions about exactly what this shift means design methodologies, team interactions, and what kind of training will be required in the future. Playing heavily into this is the fact that toda... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 28 Apr, 2016 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, gave the keynote at DVCon this year. He said that if you pull together a bunch of pre-verified IP blocks, it does not change the verification problem at the system level. That sounds like a problem. There are assumptions made that the IP blocks work to a reasonable degree, and that when performing system-level verification the focus is not a... » read more

Next EUV Challenge: Pellicles
By Mark LaPedus - 27 Apr, 2016 - Comments: 1

Extreme ultraviolet (EUV) lithography is still not ready for high-volume manufacturing, but the technology is at least moving in the right direction. Both the [gettech id="31045" comment="EUV"] light source and resists are making noticeable progress, even though there are still challenges in the arena. And then, there is the EUV mask infrastructure, which also has some gaps. “When EUV i... » read more

2.5D Becomes A Reality
By Ed Sperling - 27 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss 2.5D and advanced packaging with Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; Rob Aitken, an [getentity id="22186" comment="ARM"] fellow; John Shin, vice president at [getentity id="22903" e_name="Marvell"]; Bill Isaacson, director of ASIC marketing at [getentity id="22242" e_name="eSilicon"]; Frank Ferro, senior di... » read more

Are Simulation’s Days Numbered?
By Brian Bailey - 26 Apr, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the limitations of simulation in more complex designs with [getperson id="11049" comment="Michael McNamara"], CEO of [getentity id="22716" comment="Adapt-IP”]; Pete Hardee, product management director at [getentity id="22032" e_name="Cadence"]; David Kelf, vice president of marketing for for [getentity id="22395" e_name="OneSpin Solutions"]; Lauro... » read more

10nm Versus 7nm
By Mark LaPedus - 25 Apr, 2016 - Comments: 20

The silicon foundry business is heating up, as vendors continue to ramp their 16nm/14nm finFET processes. At the same time, they are racing each other to ship the next technologies on the roadmap—10nm and 7nm. But the landscape is complicated, with each vendor taking a different strategy. [getentity id="22865" e_name="Samsung"], for one, plans to ship its 10nm [getkc id="185" kc_name="fi... » read more

7nm Fab Challenges
By Mark LaPedus - 21 Apr, 2016 - Comments: 3

Leading-edge foundry vendors have made the challenging transition from traditional planar processes into the finFET transistor era. The first [getkc id="185" kc_name="finFETs"] were based on the 22nm node, and now the industry is ramping up 16nm/14nm technologies. Going forward, the question is how far the finFET can be scaled. In fact, 10nm finFETs from Samsung are expected to ramp by ye... » read more

Foundries Expand Their Scope
By Ed Sperling - 21 Apr, 2016 - Comments: 0

By Ed Sperling & Mark LaPedus Major foundries are stepping up their offerings across a wide swath of technology nodes, specialty processes and advanced packaging—a recognition that end markets are fragmenting and that the path forward includes a mix of new and established processes. As the smart phone market flattens, there is no single "next big thing" to drive volume at the most ... » read more

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