The Road To Osmosis

By Rob van Blommestein - 27 Oct, 2021 - Comments: 0

It’s happening. Some may have speculated that, with the acquisition of OneSpin by Siemens, the OneSpin user group meeting, more commonly known as Osmosis, would be formally (pun intended) absorbed into a larger Siemens event. Well, I’m here to tell you that Osmosis is officially on the books and will continue to focus on the specific area of formal verification. The team has been working di... » read more

Easing The Burden Of Early Bug Detection

By Rob van Blommestein - 26 Aug, 2021 - Comments: 0

Integrated circuit designers are under constant pressure to deliver bug free code that meets ever more rigorous requirements. It is well known that the more bugs that can be detected early in the development process, the faster and easier that development effort will be. However, early bug detection requires a verification overhead on the designer that can be onerous and impact the design proce... » read more

Formally Verifying SystemC/C++ Designs

By Rob van Blommestein - 29 Jul, 2021 - Comments: 0

We’re seeing an increase in the number of designs employing SystemC/C++. This isn’t surprising given the fact that specific use models have emerged to drive common design flows across engineering teams leading to the adoption of high-level synthesis (HLS) at many large semiconductor and electronic systems companies. These HLS tools are a popular method to rapidly generate design components ... » read more

Precision: A Case Study For Success

By Rob van Blommestein - 09 Jun, 2021 - Comments: 0

Recently, I was watching a documentary on the NASA Perseverance mission to Mars. I’ve always been fascinated by space travel and the engineering efforts to make it happen. We’ve all heard that the landing for this trip to Mars was the most precise in history, but what the documentary brought to light is the precision involved in each and every aspect of the Perseverance Rover design and dev... » read more

The Case For FPGA Equivalence Checking

By Rob van Blommestein - 06 May, 2021 - Comments: 0

Formal Equivalence Checking (EC) has become a standard part of the ASIC development flow, replacing almost all gate level simulation with a rigorous consistency check between pre- and post-synthesized code. In the Field Programmable Gate Array (FPGA) space, EC is still a relatively new concept, but is rapidly becoming important given the large devices being employed today. For the largest FP... » read more

Unlock Your Vision… And A Bit Of EDA History

By McKenzie Ross - 29 Mar, 2021 - Comments: 0

Repetitive patterns and hardware designs have something in common: there may be more than meets the eye. Even simple designs can have corner cases that are hard to detect by code review alone, and the situation is even more complex if third-party or legacy IP is involved. What if the IP has a deliberately hidden function? This is where verification tools like OneSpin 360 come in, to remove huma... » read more

Verification Knowledge At Your Fingertips

By Rob van Blommestein - 25 Feb, 2021 - Comments: 0

If you’re like most engineers, you’re curious about how other engineers tackle some of the most difficult challenges. What can you absorb from them and apply to your own projects? Learning from experience has tremendous value but learning from others’ experiences is arguably more valuable since the cost to acquire that knowledge is significantly cheaper. At OneSpin, we’ve lowered... » read more

RISC-V Becoming Less Risky With The Right Verification

By Rob van Blommestein - 25 Jan, 2021 - Comments: 1

RISC-V continues to make headlines across the electronic design industry. You may have seen the recent news that the OpenHW Group is delivering their first RISC-V core, the CV32E40P. If you attended last month’s RISC-V Summit, perhaps you attended “CORE-V: Industrial Grade Open-Source RISC-V Cores” by Rick O’Connor, president of the OpenHW Group. In this session, Rick discussed how the ... » read more

A Tale Of Two Challenges: From Space Exploration To Unlocking Your Vision

By Rob van Blommestein - 22 Dec, 2020 - Comments: 0

I love a good puzzle, and I’m guessing most engineers do as well. After all, engineers spend their days solving complex problems to deliver the most advanced products to the world or to perform mission-critical tasks. We kicked off this season of merriment with the latter in mind at this year’s Nokia FPGA Conference and “Mission to Mars” Hackathon in late November. Now, just in time for... » read more

Tackling Functional Correctness, Safety, Trust And Security

By Rob van Blommestein - 29 Sep, 2020 - Comments: 0

We’re six months into the pandemic, and it looks like in-person conferences are becoming a distant memory and that virtual conferences are now becoming routine. It used to be that traveling to a conference (sometimes long distances) was the only way to be able to attend technical presentations and learn about the latest technologies and methodologies, and that was only if you received permiss... » read more

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