Rethinking Scan Chains In Semiconductor Test


An explosion in design complexity, fueled by increased transistor density and fundamental shifts in chip architectures, are beginning to overwhelm traditional approaches to test. Defects can show up in the clock trees that drive scan chains, and even inside blocks of scan cells, which may number in the millions. Jayant D'Souza, technical product director for yield learning products in Siemens E... » read more

LLMs On The Edge


Nearly all the data input for AI so far has been text, but that's about to change. In the future, that input likely will include video, voice, as well as other types of data, causing a massive increase in the amount of data that needs to be modeled and the compute resources necessary to make it all work. This is hard enough in hyperscale data centers, which are sprouting up everywhere to handle... » read more

Agentic AI In Chip Design


Large language models (LLMs) like ChatGPT are just the starting point for generating content with AI. The next phase will be about harnessing LLMs with agents, providing automated feedback and improvements in performance and accuracy. Mehir Arora, backend engineer at ChipAgents, talks about the impact this can have on EDA and chip design, allowing smaller teams to compete with larger teams, and... » read more

Big Changes In Medical Electronics


Medical devices are becoming more capable, more complicated, and more deployable in the field rather than in a hospital or a doctor's office. But getting these purpose-built devices into the hands of consumers requires a whole bunch of new challenges, from safeguarding fragile on-board chemistries that can be destroyed by existing chip manufacturing and packaging processes to ensuring the mater... » read more

Optical Interconnectivity At 224 Gbps


AI is generating so much traffic that traditional copper-based approaches for moving data inside a chip, between chips, and between systems, are running out of steam. Just adding more channels is no longer viable. It requires more power to drive signals, and the distance those signals can travel without excessive loss is shrinking. Mike Klempa, product marketing specialist at Alphawave Semi, di... » read more

Problems In Testing AI Chips


As AI chips get larger, it becomes much harder to test them. Today, there can be as many as 22,000 pins on a 150mm² die, but in the future that number may increase to 80,000 pins. That creates a huge challenge for the fabs and the testers. Jack Lewis, chief technologist at Modus Test, talks about the intricacies of testing these complex devices, from maintaining contact with those pins even on... » read more

Speeding Up Die-To-Die Interconnectivity


Disaggregating SoCs, coupled with the need to process more data faster, is forcing engineering teams to rethink the electronic plumbing in a system. Wires don't shrink, and just cramming more wires or thicker wires into a package are not viable solutions. Kevin Donnelly, vice president of strategic marketing at Eliyan, talks about how to speed up data movement between chiplets with bi-direction... » read more

Conversing With Your Dishwasher


What does "Error 22" mean on your smart appliance? Today, most people have to look it up on the internet, but that's about to change. John Weil, vice president and general manager for Synaptics IoT and Edge AI Processor business unit, talks about how AI can be inexpensively and efficiently utilized by mapping directly to a database using a natural language interface. Unlike today, that informat... » read more

What’s Changing In SerDes


SerDes is all about pushing data through the smallest number of physical channels. But when it comes to AI, more data needs to be moved, and it has to be moved more quickly. Todd Bermensolo, product marketing manager at Alphawave Semi, talks about the impact of faster data movement on the transmitter (more power) and on the receiver (gain and advanced equalization), how to ensure signal inte... » read more

Optimizing Data Movement In SoCs And Advanced Packages


The amount of data that needs to move around a chip is growing exponentially, driven by the rollout of AI and more sensors everywhere. There may be hundreds of IP blocks, more compute elements, and many more wires to contend with. Andy Nightingale, vice president of product management and marketing at Arteris, talks about the demand for low-latency on-chip communication in increasingly complex ... » read more

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