category: Videos

category: Auto, Security & Edge AI

Overcoming Bottlenecks In Data Movement
By Ed Sperling - 27 May, 2026 - Comments: 0

AI is all about data. There is more data to process, store, and move, and more tradeoffs required to do that efficiently and with enough flexibility to handle changes in future workloads. Nandan Nayampally, chief commercial officer at Baya Systems, talks about networks on chip and networks across chip, what the choke points are for data movement, and where and when data coherency makes sense. » read more

DFT In Automotive
By Ed Sperling - 13 May, 2026 - Comments: 0

Ensuring automotive chips are reliable, defect-free, and secure adds a whole new dimension to design for testability (DFT). Depending on the safety criticality of a system in an automobile, tests can range from key-on, once a car is started, to safety-critical features that may need to be tested every couple hundred milliseconds during operation. Lee Harrison, director of automotive IC solution... » read more

New CPU Memory Module
By Ed Sperling - 28 Apr, 2026 - Comments: 0

Moving data has become the top challenge inside data centers. There is more data to process, more to move, and more to store and retrieve from memory. This is where small outline compression attached memory modules (SOCAMMs) fit in. Frank Ferro, group director for product management at Cadence, talks about the benefits of this next-gen modular low-power memory standard, how it compares with oth... » read more

System-in-Package Challenges
By Ed Sperling - 23 Apr, 2026 - Comments: 0

Systems companies and leading-edge chipmakers are pushing past reticle limits with chiplet-based designs, often breaking compute-intensive functions into different chiplets and coupling those with other chiplets that may have been developed by different teams and at different process nodes. This is harder than it sounds, and results can vary widely even under the best circumstances. Nir Sever, ... » read more

Why Proof Convergence Matters
By Ed Sperling - 20 Apr, 2026 - Comments: 0

Achieving a deterministic "yes or no" answer in semiconductor verification is becoming more challenging as chip complexity increases. There are more cores, more potential interactions, and more reliance on AI to build AI chips. Ashish Darbari, CEO of Axiomise, talks about the impact of functional interactions involving safety and security, and where to look for common patterns to prevent bugs f... » read more

Why More CPUs Are Needed For Agentic AI
By Ed Sperling - 15 Apr, 2026 - Comments: 0

The shift from generative AI to agentic AI will significantly increase the amount of compute power needed in data centers. Queries to search for and analyze data from multiple sources will be performed simultaneously by agents and without human intervention, rather than a single request from a live person. Jeff Defilippi, senior director of product management at Arm, talks about the impact of r... » read more

State Of The Market For Edge Silicon
By Ed Sperling - 08 Apr, 2026 - Comments: 0

The explosion of data and the rapid ramp of AI is causing significant changes in how chips are architected. At the edge, the key metrics are power, latency, and performance, but those can vary significantly by application and by workload. Steve Roddy, chief marketing officer at Quadric, talks about the need to balance performance and efficiency with flexibility for different applications, what ... » read more

Memory For AI At The Edge
By Ed Sperling - 18 Mar, 2026 - Comments: 0

Inferencing at the edge has very different needs than training large language models or large-scale inferencing in AI data centers. Many edge devices run on a battery. They're price-sensitive, and they are constrained by the physical area of the device. As a result, the amount of memory that can be packed into these devices is also limited. Steve Woo, Rambus fellow and distinguished inventor, t... » read more

How AI Will Automate Chip Design
By Ed Sperling - 17 Mar, 2026 - Comments: 0

AI has been used in EDA for many years for the core algorithms in tools, but it's getting smarter and more optimized with the rollout of generative and agentic AI. As it evolves and improves, hardware engineers are finding ways to leverage it for more complex tasks. Ziyad Hanna, corporate vice president at Cadence, talks about five levels of autonomy in chip design that mirror those in the auto... » read more

Improving Yield Through Shared Data
By Ed Sperling - 11 Mar, 2026 - Comments: 0

Increasing complexity due to advanced packaging, multi-die assemblies, and more devices under test is having an impact on yield, which in turn slows time to market and impacts overall chip costs. What's needed is a way to share data that previously was siloed by chipmakers, fabs, and OSATs. Jayant D'Souza, technical product director at Siemens EDA, talks about the underlying drivers for sharing... » read more

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