Software-Defined Systems


Using high-level software languages to define semiconductors is faster, easier, and allows for more changes long before the RTL stage. This is especially useful for chiplets and embedded accelerators, which are narrower in scope and more targeted at different workloads and specific domains. But there are some caveats for engineers working in this space. Russell Klein, program director for Sieme... » read more

Challenges In Moving Data In Chips


The number of processes running simultaneously inside of chips is growing, fueled by massive increases in data from AI and sensors everywhere. The challenge now, particularly in multi-die assemblies, is how to prioritize where signals go, how quickly they move, and when they're supposed to arrive at shared memories. Andy Nightingale, vice president of product management and marketing at Arteris... » read more

Reliability And Traceability In Advanced Packages


The move from planar SoCs to advanced packages can improve performance and provide flexibility in large designs, which are difficult to fit onto a single reticle-sized die. But ensuring the device works as expected remains a challenge. There are multiple packaging options to choose from — 2.5D, fan-out wafer-level packaging, 3D-ICs, and various types of system-in-package — and many possible... » read more

Generative AI In Chip Manufacturing


Generative AI is a natural-language or text-based query, predicting patterns based on a massive set of data. While most of the attention has been focused on chatbots and copilots, it also can be used to identify small, transient aberrations in semiconductor manufacturing that are otherwise difficult to find. Jon Herlocker, vice president and general manager of software analytics at Cohu, talks ... » read more

DFT Shifts Further Left


Design for test is now an essential part of all advanced-node designs, but DFT dynamics are changing with the move to multi-die assemblies. More components, including chiplets, make it imperative to analyze more data earlier. Jeff Meyer, product manager for Tessent logic test at Siemens EDA, talks about how to reduce the cost of this analysis and the time it takes to do it, how much can be shif... » read more

AI-Driven Collaboration In Chip Manufacturing


3D chips and multi-die assemblies can offer significant improvements in performance and power, but the tradeoff is the increased amount of time and money it takes to generate working silicon. There are more process steps, more interactions between processes, and more data to manage throughout the manufacturing flow — so much, in fact, that it has now reached well beyond what even the best eng... » read more

Challenges In Testing Photonics In Chips


The semiconductor industry has spent decades improving reliability and consistency by standardizing when and how to test it, how to collect critical data from those tests, and what to do with that data. But electrical test data is very different from silicon photonics, which is being bundled into these SoCs and multi-die assemblies alongside traditional electrical components. Aftkhar Aslam, CEO... » read more

Changes In Mixed-Signal IC Verification


Analog and digital engineers traditionally have worked in very different worlds. Many analog engineers for years have opted to verify analog designs by scrutinizing waveforms, while digital engineers have treated analog blocks like black boxes. But as these two areas converge in advanced SoCs and multi-die assemblies, the demarcation line between these engineering disciplines is being erased. S... » read more

Advanced Process Control In Semiconductor Manufacturing


Fifth in a seven-part series: Advanced process control for semiconductor wafers is evolving in ways that can significantly improve yield and reduce scrap. As dimensions shrink, the need to improve manufacturing processes and reduce variability requires more precision. "Classic" APC was a step in the right direction, identifying problems in a process chamber, for example, and automating adjustme... » read more

Improving IC System Quality And Performance


Ensuring that multi-die assemblies and advanced SoCs will work as expected from time zero to the end of their lifecycle adds new challenges for chipmakers and their customers. Chips are being run harder, hotter, and for longer periods of time, often in unique configurations and with customized workloads. Alex Burlak, vice president of test and analytics at proteanTecs, talks about how to identi... » read more

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