Latency Under Load: HBM2 vs. GDDR6


Steven Woo, Rambus fellow and distinguished inventor, explains why data traffic and bandwidth are critical to choosing the type of DRAM, options for improving traffic flow in different memory types, and how this works with multiple memory types.   Related Video GDDR6 - HBM2 Tradeoffs Why designers choose one memory type over another. Applications for each were clearly delineate... » read more

New Challenges For Data Centers


Rita Horner, senior technical marketing manager in Synopsys’ Solutions Group, looks at the impact of a significant rise in data, why this often leads to big cost increases, and where the bottlenecks are occurring. » read more

Making AI More Dependable


Ira Leventhal, vice president of Advantest’s new concept product initiative, looks at why AI has taken so long to get going, what role it will play in improving the reliability of all chips, and how to use AI to improve the reliability of AI chips themselves. » read more

Automotive System Design


Burkhard Huhnke, vice president of automotive at Synopsys, looks at how to build and update chips in increasingly sophisticated vehicles, where the problem spots are, and what comes next. » read more

Improving Edge Inferencing


Cheng Wang, senior vice president of engineering at Flex Logix, talks with Semiconductor Engineering about how to improve the efficiency and speed of edge inferencing chips, what causes bottlenecks, and why AI chips are different from other types of semiconductors. » read more

Complexity’s Impact On Security


Ben Levine, senior director of product management for Rambus’ Security Division, explains why security now depends on the growing number of components and the impact of interactions between those components. This is particularly problematic with AI chips, both on the training and inferencing side, where security problems on the training side can alter models for AI inferencing. » read more

Verification At 7/5nm


Christen Decoin, senior director of business development at Synopsys, talks about what’s missing in verification, how is that affected by complex chips such as 7nm SoCs or AI chips, and why more steps need to be done concurrently. https://youtu.be/bz6KyJh67sI » read more

Safety-Critical Coverage


Dave Landoll, solutions architect at OneSpin Solutions, discusses verification in safety-critical designs, why it’s more of a challenge in automotive than in avionics, and why verification of these systems includes what the system should not be doing as well as what it should be doing. https://youtu.be/Ze3WwEARfx0 » read more

Multi-Physics At 5/3nm


Joao Geada, chief technologist at ANSYS, talks about why timing, process, voltage, and temperature no longer can be considered independently of each other at the most advanced nodes, and why it becomes more critical as designs shrink from 7nm to 5nm and eventually to 3nm. In addition, more chips are being customized, and more of those chips are part of broader systems that may involve an AI com... » read more

GDDR6 – HBM2 Tradeoffs


Steven Woo, Rambus fellow and distinguished inventor, talks about why designers choose one memory type over another. Applications for each were clearly delineated in the past, but the lines are starting to blur. Nevertheless, tradeoffs remain around complexity, cost, performance, and power efficiency.   Related Video Latency Under Load: HBM2 vs. GDDR6 Why data traffic and bandw... » read more

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