category: Videos

category: IoT, Security & Automotive

Tech Talk: 5/3nm Parasitics
By Ed Sperling - 22 Feb, 2018 - Comments: 0

Ralph Iverson, principal R&D engineer at Synopsys, talks about parasitic extraction at 5/3nm and what to expect with new materials and gate structures such as gate-all-around FETs and vertical nanowire FETs. https://youtu.be/24C6byQBkuI » read more

Tech Talk: Verification
By Ed Sperling - 30 Nov, 2017 - Comments: 0

Frank Schirrmeister, Cadence's senior group director for verification platforms, talks about what's changing in verification with 5G, machine learning, greater connectivity, advanced packaging, and the growing need to build security into designs. https://youtu.be/GMF8BkmdJzE » read more

Tech Talk: Pseudo SRAM
By Ed Sperling - 26 Oct, 2017 - Comments: 0

eSilicon's Kar Yee Tang explains how to improve performance at 10/7nm without affecting power and area. https://youtu.be/4LI1pBLxxS4 » read more

Tech Talk: TCAM
By Ed Sperling - 28 Sep, 2017 - Comments: 0

Dennis Dudeck, IP solutions FAE at eSilicon, talks about how to save power and area with ternary content addressable memory. https://youtu.be/y1FhdoNdzOw » read more

Tech Talk: DO-254
By Ed Sperling - 24 Aug, 2017 - Comments: 0

Aldec's Louie De Luna explains the safety critical standard for the aerospace industry and how that parallels what's happening in automotive electronics. https://youtu.be/qa1g1NNVj60 » read more

Tech Talk: ISO 26262
By Ed Sperling - 12 Jun, 2017 - Comments: 0

Arteris' Kurt Shuler discusses what's changing in the automotive standard and how everything is supposed to work in the future. » read more

Biz Talk: ASICs
By Ed Sperling - 27 Mar, 2017 - Comments: 0

eSilicon CEO [getperson id="11145" comment="Jack Harding"] talks about the future of scaling, advanced packaging, the next big things—automotive, deep learning and virtual reality—and the need for security. [youtube vid=leO8gABABqk]   Related Stories Executive Insight: Jack Harding (Aug 2016) eSilicon’s CEO looks at industry consolidation, competition, China’s impact, an... » read more

Tech Talk: Timing Closure
By Ed Sperling - 29 Dec, 2016 - Comments: 0

Arteris' George Janac talks about timing closure issues in advanced chips and why this has reared its head again for the first time in a decade.   Related Stories Timing Closure Issues Resurface Adding more features and more power states is making it harder to design chips at 10nm and 7nm. » read more

Tech Talk: Earlier Software
By Ed Sperling - 02 Nov, 2016 - Comments: 0

Malte Doerper, senior manager of product management at Synopsys, talks about the big "shift left" for software, where the problems crop up, and how to save as much as a year of development time with automation and better methodologies.   Related Stories Bridging Hardware And Software The need for concurrent hardware-software design and verification is increasing, but are engine... » read more

Tech Talk: ADAS
By Ed Sperling - 23 Mar, 2016 - Comments: 0

Kurt Shuler, vice president of marketing at Arteris, explains what the Advanced Driver Assistance Systems standard is, where the problems are, and why this is becoming so important in automotive semiconductor design. » read more

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