Finding Hardware Trojans


John Hallman, product manager for trust and security at OneSpin Technologies, looks at how to identify hardware Trojans in a design, why IP from different vendors makes this more complicated, and how a digital twin can provide a reference point against which to measure if a design has been compromised. » read more

Thermal Challenges In Advanced Packaging


CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

Electromagnetic Challenges In High-Speed Designs


ANSYS’ Anand Raman, senior director, and Nermin Selimovic, product sales specialist, talk with Semiconductor Engineering about how to deal with rising complexity and tighter tolerances in AI, 5G, high-speed SerDes and other chips developed at the latest process nodes where the emphasis is on high performance and low power. » read more

Die-To-Die Connectivity


Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how die-to-die communication is changing as Moore’s Law slows down, new use cases such as high-performance computing, AI SoCs, optical modules, and where the tradeoffs are for different applications.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTu... » read more

Using Digital Twins And DL In Lithography


Leo Pang, chief product officer and executive vice president at D2S, looks at the results of inverse lithography technology at advanced nodes using curvilinear patterns, and how that can be combined with a digital twin and deep learning speed up time to market and reduce cost. » read more

Making Sense Of Inferencing Options


Ian Bratt, fellow in Arm’s machine learning group, sheds light on all the different processing elements in machine learning, how different end user requirements affect those choices, why CPUs are a critical element in orchestrating what happens in these systems, and how power and software play into these choices. » read more

Reducing Data At The Source


Jens Döge, group manager for image acquisition and processing in Fraunhofer IIS’ Engineering of Adaptive Systems Division, talks about how to slash the amount of data that needs to be sent to the cloud or edge for processing by focusing only on the regions of interest in an image, and how that reduces the cost of moving that data. » read more

GDDR6 Drilldown: Applications, Tradeoffs And Specs


Frank Ferro, senior director of product marketing for IP cores at Rambus, drills down on tradeoffs in choosing different DRAM versions, where GDDR6 fits into designs versus other types of DRAM, and how different memories are used in different vertical markets. » read more

Using Machine Learning To Break Down Silos


Jeff David, vice president of AI solutions at PDF Solutions, talks with Semiconductor Engineering about where machine learning can be applied into semiconductor manufacturing, how it can be used to break down silos around different process steps, how active learning works with human input to tune algorithms, and why it’s important to be able to choose different different algorithms for differ... » read more

How 5G Affects Test


David Hall, head of semiconductor marketing at National Instruments, talks with Semiconductor Engineering about architectural changes to infrastructure due to the rollout of 5G and how the move from macrocells to small cells is changing test requirements.         Subscribe to Semiconductor Engineering's YouTube Channel here » read more

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