Testing Autonomous Vehicles


Jeff Phillips, head of automotive marketing at National Instruments, talks about how to ensure that automotive systems are reliable and safe, how test needs to shift to adapt to continual updates and changes, and why this is particularly challenging in a world where there is no known right answer. » read more

How To Ensure Reliability


Michael Schuldenfrei, corporate technology fellow at OptimalPlus, talks about how to measure quality, why it’s essential to understand all of the possible variables in the testing process, and why outliers are no longer considered sufficient to ensure reliability. » read more

MLPerf Benchmarks


Geoff Tate, CEO of Flex Logix, talks about the new MLPerf benchmark, what’s missing from the benchmark, and which ones are relevant to edge inferencing. » read more

Challenges In IP Reuse


Jeff Markham, software architect at ClioSoft, explains why IP reuse is so important in advanced process node SoC chip designs, what companies need to keep track of when working with third-party IP, and how it needs to be characterized. » read more

CXL Vs. CCIX


Kurt Shuler, vice president of marketing at ArterisIP, explains how these two standards differ, which one works best where, and what each was designed for. » read more

Distributed Design Implementation


PV Srinivas, group director for R&D at Synopsys, talks about the impact of larger chips and increasing complexity on design productivity, why divide-and-conquer doesn’t work so well anymore, and how to reduce the number of blocks that need to be considered to achieve faster timing closure and quicker time to market. » read more

Finding Hardware Trojans


John Hallman, product manager for trust and security at OneSpin Technologies, looks at how to identify hardware Trojans in a design, why IP from different vendors makes this more complicated, and how a digital twin can provide a reference point against which to measure if a design has been compromised. » read more

Thermal Challenges In Advanced Packaging


CT Kao, product management director at Cadence, talks with Semiconductor Engineering about why packaging is so complicated, why power and heat vary with different use cases and over time, and why a realistic power map is essential particularly for AI chips, where some circuits are always on.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTube channel here » read more

Electromagnetic Challenges In High-Speed Designs


ANSYS’ Anand Raman, senior director, and Nermin Selimovic, product sales specialist, talk with Semiconductor Engineering about how to deal with rising complexity and tighter tolerances in AI, 5G, high-speed SerDes and other chips developed at the latest process nodes where the emphasis is on high performance and low power. » read more

Die-To-Die Connectivity


Manmeet Walia, senior product marketing manager at Synopsys, talks with Semiconductor Engineering about how die-to-die communication is changing as Moore’s Law slows down, new use cases such as high-performance computing, AI SoCs, optical modules, and where the tradeoffs are for different applications.   Interested in more Semiconductor Engineering videos? Sign-up for our YouTu... » read more

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